Agilex™ 7 SoC FPGA Boot User Guide

ID 683389
Date 8/28/2024
Public
Document Table of Contents

A.6. BOOT_SCRATCH_COLD6, BOOT_SCRATCH_COLD7

Boot Scratch Register Agilex™ 7 F/I-Series Agilex™ 7 M-Series
BOOT_SCRATCH_COLD6, BOOT_SCRATCH_COLD7
Bits[63:0] These two registers form together a 64-bit value, which is used to indicate through the magic value 0x1228E5E7 (L2_RESET_DONE_REG) that an L2 reset is done.
  • Usage:
    • U-Boot:
      • drivers/sysreset/sysreset_socfpga_soc64.c: __l2_reset_cpu(): writes magic value L2_RESET_DONE_STATUS (0x1228E5E7) to the register, triggers L2 reset, then puts all cores in WFI
      • arch/arm/mach-socfpga/lowlevel_init_soc64.S: lowlevel_init(): when in SPL, it reads the register, and if equal to magic value 0x1228E5E7, then request a warm reset through RMR_EL3.
    • ATF:
      • plat/intel/soc/common/socfpga_psci.c:socfpga_system_reset2() writes magic value L2_RESET_DONE_STATUS (0x1228E5E7) to the register
      • plat/intel/soc/common/aarch64/plat_helpers.S: plat_get_my_entrypoint() reads the register, and if equal to magic value 0x1228E5E7, then requests a warm reset through RMR_EL3