Visible to Intel only — GUID: nrc1520797048644
Ixiasoft
1. Introduction
2. FPGA Configuration First Mode
3. HPS Boot First Mode
4. Creating the Configuration Files
5. Golden System Reference Design and Design Examples
6. Configuring the FPGA Fabric from HPS Software
7. Debugging the Intel® Agilex™ SoC FPGA Boot Flow
A. Document Revision History for Intel® Agilex™ SoC FPGA Boot User Guide
Visible to Intel only — GUID: nrc1520797048644
Ixiasoft
3.1.5. Operating System
The SSBL loads the operating system (OS) stage into SDRAM. The OS executes from SDRAM. Depending on your application requirements you may implement a conventional OS or an RTOS.
Intel provides the Golden System Reference Design (GSRD) which includes the Linux kernel and a root filesystem built with Yocto recipes.
Related Information