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1. Introduction
2. FPGA Configuration First Mode
3. HPS Boot First Mode
4. Creating the Configuration Files
5. Golden System Reference Design and Design Examples
6. Configuring the FPGA Fabric from HPS Software
7. Debugging the Intel® Agilex™ SoC FPGA Boot Flow
A. Document Revision History for Intel® Agilex™ SoC FPGA Boot User Guide
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4.6. Configuration from QSPI
The device configures itself with the bitstream which it reads from QSPI flash. This configuration method is also called “Active Serial x4” or “ASx4”.