Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 7/08/2024
Public
Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 1D LUT Intel® FPGA IP 9. 3D LUT Intel® FPGA IP 10. Adaptive Noise Reduction Intel® FPGA IP 11. Advanced Test Pattern Generator Intel® FPGA IP 12. AXI-Stream Broadcaster Intel® FPGA IP 13. Bits per Color Sample Adapter Intel FPGA IP 14. Black Level Correction Intel® FPGA IP 15. Black Level Statistics Intel® FPGA IP 16. Chroma Key Intel® FPGA IP 17. Chroma Resampler Intel® FPGA IP 18. Clipper Intel® FPGA IP 19. Clocked Video Input Intel® FPGA IP 20. Clocked Video to Full-Raster Converter Intel® FPGA IP 21. Clocked Video Output Intel® FPGA IP 22. Color Plane Manager Intel® FPGA IP 23. Color Space Converter Intel® FPGA IP 24. Defective Pixel Correction Intel® FPGA IP 25. Deinterlacer Intel® FPGA IP 26. Demosaic Intel® FPGA IP 27. FIR Filter Intel® FPGA IP 28. Frame Cleaner Intel® FPGA IP 29. Full-Raster to Clocked Video Converter Intel® FPGA IP 30. Full-Raster to Streaming Converter Intel® FPGA IP 31. Genlock Controller Intel® FPGA IP 32. Generic Crosspoint Intel® FPGA IP 33. Genlock Signal Router Intel® FPGA IP 34. Guard Bands Intel® FPGA IP 35. Histogram Statistics Intel® FPGA IP 36. Interlacer Intel® FPGA IP 37. Mixer Intel® FPGA IP 38. Pixels in Parallel Converter Intel® FPGA IP 39. Scaler Intel® FPGA IP 40. Stream Cleaner Intel® FPGA IP 41. Switch Intel® FPGA IP 42. Tone Mapping Operator Intel® FPGA IP 43. Test Pattern Generator Intel® FPGA IP 44. Unsharp Mask Intel® FPGA IP 45. Video and Vision Monitor Intel FPGA IP 46. Video Frame Buffer Intel® FPGA IP 47. Video Frame Reader Intel FPGA IP 48. Video Frame Writer Intel FPGA IP 49. Video Streaming FIFO Intel® FPGA IP 50. Video Timing Generator Intel® FPGA IP 51. Vignette Correction Intel® FPGA IP 52. Warp Intel® FPGA IP 53. White Balance Correction Intel® FPGA IP 54. White Balance Statistics Intel® FPGA IP 55. Design Security 56. Document Revision History for Video and Vision Processing Suite User Guide

36.5. Interlacer IP Software API

The IP includes software for run-time control. The IP does not fit any of the generic device models provided by the Nios II HAL and it exposes a set of dedicated accessors to the control and status registers. The IP driver structure inherits the base driver structure so all common methods defined in Video and Vision Processing IPs Software API are applicable.

Register definition header file: intel_vvp_interlacer_regs.h

Include file: intel_vvp_interlacer.h

Table 636.  Interlacer IP Software API
Name Description
intel_vvp_interlacer_init Initialize the Interlacer instance
intel_vvp_core_* Accessors defined in Video and Vision Processing IPs Software Programming Model . Writable when Lite mode is on. Readable when Lite mode is off and Debug features is on.
intel_vvp_interlacer_get_lite_mode Returns if Lite mode is on
intel_vvp_interlacer_get_debug_enabled Returns if Debug features is on
intel_vvp_interlacer_is_running Returns if the IP is currently processing video data
intel_vvp_interlacer_get_commit_status Returns if the IP has uncommitted writes
intel_vvp_interlacer_get_status Reads the status register
intel_vvp_interlacer_set_enable Enables or disables interlacing
intel_vvp_interlacer_enable

Enables interlacing

intel_vvp_interlacer_disable

Disables interlacing

intel_vvp_interlacer_set_ctrl_override Enables or disables using image information packets to select the lines to keep in full varians.t
intel_vvp_interlacer_set_f1_first Selects if the output interlaced stream starts with a F0 or F1
intel_vvp_interlacer_is_enabled Returns the interlacer enabled or disabled status
intel_vvp_interlacer_get_ctrl_override Returns if image information packets select the lines to discard
intel_vvp_interlacer_get_f1_first Returns if the output interlaced stream starts with a F0 or F1
intel_vvp_interlacer_commit_writes Commit all outstanding writes

intel_vvp_interlacer_init

Prototype
int intel_vvp_interlacer_init(intel_vvp_interlacer_instance *instance, intel_vvp_core_base base);
Description

Initializes an Interlacer instance. The initialization stops early if the vendor ID or product ID read at the base address are not a match or if the register map version is not supported. Otherwise, the function proceeds to read and store the IP compile-time parameterization. The instance is not fully initialized and the application should not use it further if returning a non-zero error code.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

base - base address of the register map

Returns

kIntelVvpCoreOk (0) in case of success, a negative error code in case of error

kIntelVvpCoreVidErr if the vendor id of the core is not the IntelFPGA vendor ID (0x6AF7).

kIntelVvpCorePidErr if the product_id does not match with the Interlacer product ID

kIntelVvpCoreInstanceErr if the instance is a null pointer

kIntelVvpInterlacerRegMapVersionErr if the register map is not supported

intel_vvp_interlacer_get_lite_mode

Prototype
bool intel_vvp_interlacer_get_lite_mode(intel_vvp_interlacer_instance *instance);
Description

Returns the value of the LITE_MODE register. The instance must be a valid intel_vvp_interlacer_instance fully initialized

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

true if the IP is parameterized in lite mode

intel_vvp_interlacer_get_debug_enabled

Prototype
 bool intel_vvp_interlacer_get_debug_enabled(intel_vvp_interlacer_instance *instance);
Description

Returns the value of the DEBUG_ENABLED register. The instance must be a valid intel_vvp_interlacer_instance fully initialized.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

true if the IP is parameterized with debug features on

intel_vvp_interlacer_is_running

Prototype
 bool intel_vvp_interlacer_is_running(intel_vvp_interlacer_instance* instance);
Description

Reads and returns the running bit of the STATUS register. The instance must be a valid intel_vvp_interlacer_instance fully initialized.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

True is the IP is currently receiving or storing an input field, false when between two input fields

intel_vvp_interlacer_get_commit_status

Prototype
 bool intel_vvp_interlacer_get_commit_status(intel_vvp_interlacer_instance* instance);
Description

Reads and returns the commit pending bit of the STATUS register. The instance must be a valid intel_vvp_interlacer_instance fully initialized and configured in full mode.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

True is the IP is configured in full mode and if the agent interface contains uncommitted writes.

intel_vvp_interlacer_get_status

Prototype
 uint32_t intel_vvp_interlacer_get_status(intel_vvp_interlacer_instance* instance);
Description

Reads the STATUS register. The instance must be a valid intel_vvp_interlacer_instance fully initialized.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

The content of the STATUS register

intel_vvp_interlacer_set_enable

Prototype
 int intel_vvp_interlacer_set_enable(intel_vvp_interlacer_instance *instance, bool enable);
Description

Writes to the ENABLE register to enable or disable the interlacing. The instance must be a valid intel_vvp_interlacer_instance fully initialized.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

enable - true to enable interlacing, false for input passthrough

Returns

kIntelVvpCoreOk for success, negative error code in case of failures

kIntelVvpCoreInstanceErr if the instance is invalid

intel_vvp_interlacer_enable

Prototype
 int intel_vvp_interlacer_enable(intel_vvp_interlacer_instance *instance);
Description

Enables interlacing. The instance must be a valid intel_vvp_interlacer_instance fully initialized.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

kIntelVvpCoreOk for success, negative error code in case of failures

kIntelVvpCoreInstanceErr if the instance is invalid

intel_vvp_interlacer_disable

Prototype
 int intel_vvp_interlacer_disable(intel_vvp_interlacer_instance *instance);
Description

Disables interlacing and enables input passthrough

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

kIntelVvpCoreOk for success, negative error code in case of failures

kIntelVvpCoreInstanceErr if the instance is invalid

intel_vvp_interlacer_set_ctrl_override

Prototype
 int intel_vvp_interlacer_set_ctrl_override(intel_vvp_interlacer_instance* instance, bool ctrl_override);
Description

Writes to the CTRL_OVERRIDE register to enable/disable the reading and use of the interlace nibble on image info packet to select the field to keep during interlacing. The instance must be an initialized, valid, full variant, intel_vvp_interlacer_instance.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

ctrl_override - true to enable the use of interlace nibbles in image info packet, false otherwise

Returns

kIntelVvpCoreOk for success, negative error code in case of failures

kIntelVvpCoreInstanceErr if the instance is invalid or lite variant

intel_vvp_interlacer_set_f1_first

Prototype
 int intel_vvp_interlacer_set_f1_first(intel_vvp_interlacer_instance *instance, bool f1_first)
Description

Writes to the F1_FIRST register to select which interlaced field is produced first after a setup change

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

f1_first - true to output a F1 field first whenever the IP detects a change of input or configuration, false to start with a F0

Returns

kIntelVvpCoreOk for success, negative error code in case of failures

kIntelVvpCoreInstanceErr if the instance is invalid

intel_vvp_interlacer_is_enabled

Prototype
bool intel_vvp_interlacer_is_enabled(intel_vvp_interlacer_instance *instance)
Description

Returns the current interlacer mode of operation. The instance must be a valid intel_vvp_interlacer_instance fully initialized with debug on

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

The current interlacer configuration if debug is on. True if the interlacer is active, false for progressive passthrough or if debug is off

intel_vvp_interlacer_get_ctrl_override

Prototype
bool intel_vvp_interlacer_get_ctrl_override(intel_vvp_interlacer_instance *instance)
Description

Returns the current interlacer ctrl_override setting. The instance must be a valid, full variant, intel_vvp_interlacer_instance fully initialized with debug on.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

True if the interlacer uses the input image info packet interlace nibble to determine which interlaced field is kept on a progressive frame, false otherwise or if debug is off

intel_vvp_interlacer_get_f1_first

Prototype
bool intel_vvp_interlacer_get_f1_first(intel_vvp_interlacer_instance *instance)
Description

Returns the current interlacer f1 first setting. The instance must be a valid intel_vvp_interlacer_instance fully initialized and with debug on.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

The current f1_first setting or false if debug is off

intel_vvp_interlacer_commit_writes

Prototype
 int intel_vvp_interlacer_commit_writes(intel_vvp_interlacer_instance* instance)
Description

Commits all pending writes before processing the next field. The instance must be valid and parameterized in full mode.

Arguments

instance - pointer to the intel_vvp_interlacer_instance software driver instance structure

Returns

kIntelVvpCoreOk (0) for success, negative error code otherwise