Video and Vision Processing Suite Intel® FPGA IP User Guide

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ID 683329
Date 4/04/2022
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Document Table of Contents
Document Table of Contents x
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. Chroma Resampler Intel® FPGA IP 10. Clipper Intel® FPGA IP 11. Clocked Video to Full Raster Converter Intel® FPGA IP 12. Color Space Converter Intel® FPGA IP 13. Full Raster to Clocked Video Converter Intel® FPGA IP 14. Full Raster to Streaming Converter Intel® FPGA IP 15. Guard Bands Intel® FPGA IP 16. Mixer Intel® FPGA IP 17. Pixels in Parallel Converter Intel® FPGA IP 18. Scaler Intel® FPGA IP 19. Tone Mapping Operator Intel® FPGA IP 20. Test Pattern Generator Intel® FPGA IP 21. Video Frame Buffer Intel® FPGA IP 22. Video Streaming FIFO Intel® FPGA IP 23. Warp Intel® FPGA IP 24. Design Security 25. Document Revision History for Video and Vision Processing Suite User Guide
1. About the Video and Vision Processing Suite x
1.1. Device Family Support 1.2. Video and Vision Processing IPs Release Information 1.3. Video and Vision Processing IPs Features 1.4. Lite versus Full IP Variants 1.5. Glossary of Video and Vision Terminology
2. Getting Started with the Video and Vision Processing IPs x
2.1. Video and Vision Processing IP Time-out Behavior 2.2. Generating a Video and Vision Processing IP 2.3. Simulating the Video and Vision Processing IPs
3. Video and Vision Processing IPs Functional Description x
3.1. Auxiliary Control Packets 3.2. Latency 3.3. IP Debugging Features 3.4. Stall Behavior and Error Recovery 3.5. Avalon Streaming Video Protocol Versus Intel FPGA Streaming Video Protocol
5. Video and Vision Processing IP Registers x
5.1. Video and Vision Processing IP Control Examples
7. Protocol Converter Intel® FPGA IP x
7.1. About the Protocol Converter IP 7.2. Protocol Converter IP Parameters 7.3. Protocol Converter IP Functional Description 7.4. Protocol Converter IP Interfaces 7.5. Protocol Converter IP Registers 7.6. Protocol Converter IP Software API
7.1. About the Protocol Converter IP x
7.1.1. Protocol Converter IP Performance and Resources
8. 3D LUT Intel® FPGA IP x
8.1. About the 3D LUT Intel® FPGA IP 8.2. 3D LUT IP Parameters 8.3. 3D LUT IP Block Description 8.4. 3D LUT IP Registers 8.5. 3D LUT IP Software API
8.1. About the 3D LUT Intel® FPGA IP x
8.1.1. 3D LUT IP Features 8.1.2. 3D LUT IP Performance IP and Resource Information
8.3. 3D LUT IP Block Description x
8.3.1. 3D LUT IP Interfaces 8.3.2. 3D LUT IP Latency
9. Chroma Resampler Intel® FPGA IP x
9.1. About the Chroma Resampler IP 9.2. Chroma Resampler IP Parameters 9.3. Chroma Resampler IP Functional Description 9.4. Chroma Resampler IP Registers 9.5. Chroma Resampler IP Software API
9.1. About the Chroma Resampler IP x
9.1.1. Chroma Resampler Performance and Resources
9.3. Chroma Resampler IP Functional Description x
9.3.1. Chroma Resampler IP Interfaces
10. Clipper Intel® FPGA IP x
10.1. About the Clipper IP 10.2. Clipper IP Parameters 10.3. Clipper IP Interfaces 10.4. Clipper IP Registers 10.5. Clipper IP Software API
10.1. About the Clipper IP x
10.1.1. Clipper IP Performance and Resources
11. Clocked Video to Full Raster Converter Intel® FPGA IP x
11.1. About the Clocked Video to Full Raster Converter IP 11.2. Clocked Video to Full Raster Converter Parameters 11.3. Clocked Video to Full Raster Converter Block Description 11.4. Clocked Video Converter to Full Raster IP Registers
11.1. About the Clocked Video to Full Raster Converter IP x
11.1.1. Clocked Video to Full Raster Converter Features 11.1.2. Clocked Video to Full Raster Converter Performance and Resources
11.3. Clocked Video to Full Raster Converter Block Description x
11.3.1. Clocked Video to Full Raster Converter Interfaces
12. Color Space Converter Intel® FPGA IP x
12.1. About the Color Space Converter IP 12.2. Color Space Converter IP Parameters 12.3. Color Space Converter IP Functional Description 12.4. Color Space Converter IP Registers 12.5. Color Space Converter IP Software API
12.1. About the Color Space Converter IP x
12.1.1. Color Space Converter IP Features 12.1.2. Color Space Converter IP Performance and Resources
12.3. Color Space Converter IP Functional Description x
12.3.1. Color Space Converter IP Interfaces
13. Full Raster to Clocked Video Converter Intel® FPGA IP x
13.1. About the Full Raster to Clocked Video Converter 13.2. Full Raster to Clocked Video Converter Parameters 13.3. Full Raster to Clocked Video Converter Block Description 13.4. Full Raster to Clocked Video Converter Registers
13.1. About the Full Raster to Clocked Video Converter x
13.1.1. Full Raster to Clocked Video Converter Features 13.1.2. Full Raster to Clocked Video Converter Performance and Resource Utilization
13.3. Full Raster to Clocked Video Converter Block Description x
13.3.1. Full Raster to Clocked Video Converter Interfaces
14. Full Raster to Streaming Converter Intel® FPGA IP x
14.1. About the Full Raster to Streaming Converter IP 14.2. Full Raster to Streaming Converter Parameters 14.3. Full Raster to Streaming Converter Block Description
14.1. About the Full Raster to Streaming Converter IP x
14.1.1. Full Raster to Streaming Converter Features 14.1.2. Full Raster to Streaming Converter Performance and Resources
14.3. Full Raster to Streaming Converter Block Description x
14.3.1. Full Raster to Streaming Converter Interfaces
15. Guard Bands Intel® FPGA IP x
15.1. About the Guard Bands IP 15.2. Guard Bands IP Parameters 15.3. Guard Bands IP Interfaces 15.4. Guard Bands IP Registers 15.5. Guard Bands IP Software API
15.1. About the Guard Bands IP x
15.1.1. Guard Bands IP Performance and Resources
16. Mixer Intel® FPGA IP x
16.1. About the Mixer IP 16.2. Mixer IP Parameters 16.3. Mixer IP Functional Description 16.4. Mixer IP Registers 16.5. Mixer IP Software API
16.1. About the Mixer IP x
16.1.1. Mixer IP Performance and Resources
16.3. Mixer IP Functional Description x
16.3.1. Mixer IP Interfaces
17. Pixels in Parallel Converter Intel® FPGA IP x
17.1. About the Pixels in Parallel Converter IP 17.2. Pixels in Parallel IP Converter Parameters 17.3. Pixels in Parallel Converter Interfaces 17.4. Pixels in Parallel Converter Registers 17.5. Pixels in Parallel Converter IP Software API
17.1. About the Pixels in Parallel Converter IP x
17.1.1. Pixels in Parallel IP Converter Performance and Resources
18. Scaler Intel® FPGA IP x
18.1. About the Scaler 18.2. Scaler IP Parameters 18.3. Scaler IP Functional Description 18.4. Scaler IP Registers 18.5. Scaler IP Software API
18.1. About the Scaler x
18.1.1. Scaler IP Performance and Resources
18.2. Scaler IP Parameters x
18.2.1. Updating Scaler IP Runtime Coefficients
18.3. Scaler IP Functional Description x
18.3.1. Scaler IP Interfaces
19. Tone Mapping Operator Intel® FPGA IP x
19.1. About the Tone Mapping Operator IP 19.2. TMO IP Parameters 19.3. TMO IP Block Description 19.4. TMO IP Registers 19.5. TMO IP Software API
19.1. About the Tone Mapping Operator IP x
19.1.1. TMO IP Features 19.1.2. TMO IP Performance and Resource Utilization
19.3. TMO IP Block Description x
19.3.1. TMO IP Interfaces 19.3.2. TMO IP Latency
20. Test Pattern Generator Intel® FPGA IP x
20.1. About the Test Pattern Generator IP 20.2. Test Pattern Generator IP Parameters 20.3. Test Pattern Generator IP Functional Description 20.4. Test Pattern Generator IP Registers 20.5. Test Pattern Generator IP Software API
20.1. About the Test Pattern Generator IP x
20.1.1. Test Pattern Generator IP Performance and Resources
20.3. Test Pattern Generator IP Functional Description x
20.3.1. Test Pattern Generator IP Interfaces
21. Video Frame Buffer Intel® FPGA IP x
21.1. About the Video Frame Buffer IP 21.2. Video Frame Buffer IP Parameters 21.3. Video Frame Buffer IP Functional Description 21.4. Video Frame Buffer IP Registers 21.5. Video Frame Buffer IP Software API
21.1. About the Video Frame Buffer IP x
21.1.1. Video Frame Buffer Performance and Resources
21.3. Video Frame Buffer IP Functional Description x
21.3.1. Video Frame Buffer IP Interfaces
22. Video Streaming FIFO Intel® FPGA IP x
22.1. About the Video Streaming FIFO IP 22.2. Video Streaming FIFO IP Parameters 22.3. Video Streaming FIFO IP Interfaces
22.1. About the Video Streaming FIFO IP x
22.1.1. Video Streaming FIFO IP Performance and Resources
23. Warp Intel® FPGA IP x
23.1. About the Warp IP 23.2. Warp IP Parameters 23.3. Warp IP Block Description 23.4. Warp IP Registers 23.5. Warp IP Software API
23.1. About the Warp IP x
23.1.1. Warp IP Features 23.1.2. Warp IP Performance and Resource Utilization
23.3. Warp IP Block Description x
23.3.1. Warp IP Interfaces 23.3.2. Warp IP Latency 23.3.3. External Memory for Warp IP
23.5. Warp IP Software API x
23.5.1. Using Warp IP Software 23.5.2. Warp IP Software Code Examples
24. Design Security x
24.1. Memory Subsystems 24.2. Considering Design Security
1. About the Video and Vision Processing Suite
2. Getting Started with the Video and Vision Processing IPs
3. Video and Vision Processing IPs Functional Description
4. Video and Vision Processing IP Interfaces
5. Video and Vision Processing IP Registers
6. Video and Vision Processing IPs Software Programming Model
7. Protocol Converter Intel® FPGA IP
8. 3D LUT Intel® FPGA IP
9. Chroma Resampler Intel® FPGA IP
10. Clipper Intel® FPGA IP
11. Clocked Video to Full Raster Converter Intel® FPGA IP
12. Color Space Converter Intel® FPGA IP
13. Full Raster to Clocked Video Converter Intel® FPGA IP
14. Full Raster to Streaming Converter Intel® FPGA IP
15. Guard Bands Intel® FPGA IP
16. Mixer Intel® FPGA IP
17. Pixels in Parallel Converter Intel® FPGA IP
18. Scaler Intel® FPGA IP
19. Tone Mapping Operator Intel® FPGA IP
20. Test Pattern Generator Intel® FPGA IP
21. Video Frame Buffer Intel® FPGA IP
22. Video Streaming FIFO Intel® FPGA IP
23. Warp Intel® FPGA IP
24. Design Security
25. Document Revision History for Video and Vision Processing Suite User Guide

18.5. Scaler IP Software API

The IP includes software for run-time control. The IP does not fit any of the generic device models provided by the Nios II HAL and it exposes a set of dedicated accessors to the control and status registers. The IP driver structure inherits the base driver structure so all common methods defined in Video and Vision Processing IPs Software API are applicable.

Register definition header file: intel_vvp_scaler_regs.h

Include file: intel_vvp_scaler.h

Table 273.  Scaler IP Software API
Name Description
intel_vvp_scaler_init Initialize the Scaler instance
Intel_vvp_core_* .Accessors defined in Video and Vision Processing IPs Software Programming Model . Writable when Lite is on. Readable when Lite is off and Debug features is on.
intel_vvp_scaler_get_lite_mode Returns if Lite mode is on
intel_vvp_scaler_get_debug_enabled Returns if Debug features is on

intel_vvp_scaler_get_pixels_in_parallel

Returns the number of pixels transmitted in parallel (per valid beat)

intel_vvp_scaler_get_max_input_width

Returns the maximum input width supported

intel_vvp_scaler_get_max_output_width

Returns the maximum output width supported
intel_vvp_scaler_get_scaling_algorithm Returns the scaling algorithm
intel_vvp_scaler_is_coeffs_loading_enabled Returns if the scaling coefficients can be loaded/updated at run-time
intel_vvp_scaler_are_coeffs_preinitialized Returns if the scaling coefficients are automatically initialized with default values out of reset
intel_vvp_scaler_is_vertical_scaling_enabled Returns if the IP can be configured to do vertical scaling
intel_vvp_scaler_get_num_vertical_taps Returns the number of vertical taps
intel_vvp_scaler_get_num_vertical_phases Returns the number of vertical phases
intel_vvp_scaler_get_num_vertical_banks Returns the number of vertical banks
intel_vvp_scaler_are_vertical_coeffs_signed Returns if the vertical scaling coefficients have a sign bit and can be negative

intel_vvp_scaler_get_vertical_coeffs_int_bits

Returns the number of integer bits (excluding sign bit) available to quantize the vertical scaling coefficients

intel_vvp_scaler_get_vertical_coeffs_frac_bits

Returns the number of fractional bits available to quantize the vertical scaling coefficients
intel_vvp_scaler_is_horizontal_scaling_enabled Returns if the IP can be configured to do horizontal scaling
intel_vvp_scaler_get_num_horizontal_taps Returns the number of horizontal taps
intel_vvp_scaler_get_num_horizontal_phases Returns the number of horizontal phases
intel_vvp_scaler_get_num_horizontal_banks Returns the number of horizontal banks
intel_vvp_scaler_are_ horizontal_coeffs_signed Returns if the horizontal scaling coefficients have a sign bit and can be negative

intel_vvp_scaler_get_ horizontal_coeffs_int_bits

Returns the number of integer bits (excluding sign bit) available to quantize the horizontal scaling coefficients

intel_vvp_scaler_get_ horizontal_coeffs_frac_bits

Returns the number of fractional bits available to quantize the horizontal scaling coefficients
intel_vvp_scaler_get_rounding_method Returns the method used to convert floating-point values back to integer values at the output of the IP
intel_vvp_scaler_is_running Returns if the IP is currently processing video data
intel_vvp_scaler_get_commit_status Returns if there are uncommitted writes
intel_vvp_scaler_get_status Reads the status register
intel_vvp_scaler_set_output_width Selects the output width
intel_vvp_scaler_set_output_height Selects the output height
intel_vvp_scaler_set_v_bank Selects the vertical coefficients bank for the next commit
intel_vvp_scaler_set_h_bank Selects the horizontal coefficients bank for the next commit
intel_vvp_scaler_get_output_width Returns the last selected output width
intel_vvp_scaler_get_output_height Returns the last selected output height
intel_vvp_scaler_get_v_bank Returns the last selected vertical coefficients bank
intel_vvp_scaler_get_h_bank Returns the last selected horizontal coefficients bank
intel_vvp_scaler_set_quantized_coeffs Program the IP with a new set of quantized coefficients for a specified phase
intel_vvp_scaler_set_coeffs Program the IP with a new set of floating-point coefficients for a specified phase
intel_vvp_scaler_commit_writes Commit all outstanding writes

enum eIntelVvpScalerAlgorithms

Members

kIntelVvpScalerNearestNeighborScaling (0) – Nearest neighbor scaling

kIntelVvpScalerBilinearScaling (1) – Bilinear scaling

kIntelVvpScalerPolyphaseScaling (2) – Polyphase scaling

kIntelVvpScalerInvalidScalingAlgo (-1) – Invalid scaling algorithm (used to indicate errors)

Description

Enumeration for the configurable scaling algorithms

intel_vvp_scaler_init

Prototype 
int intel_vvp_scaler_init(intel_vvp_scaler_instance *instance, intel_vvp_core_base base);
Description

Initializes a Scaler instance. The initialization stops early if the vendor ID or product ID read at the base address are not a match or if the register map version is not supported. Otherwise, the function proceeds to read and store the IP compile-time parameterization. The instance will not be fully initialized and should not be used further by the application if returning a non-zero error code.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

base – base address of the register map

Returns

kIntelVvpCoreOk (0) in case of success, a negative error code in case of error

kIntelVvpCoreVidErr if the vendor id of the core is not the IntelFPGA vendor ID (0x6AF7).

kIntelVvpCorePidErr if the product_id does not match with the Scaler product ID

kIntelVvpCoreInstanceErr if the instance is a null pointer

kIntelVvpScalerMapVersionErr if the register map is not supported

intel_vvp_scaler_get_lite_mode

Prototype 
bool intel_vvp_scaler_get_lite_mode(intel_vvp_scaler_instance *instance);
Description

Returns the value of the LITE_MODE register. The instance must be a valid intel_vvp_scaler_instance fully initialized

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

true if the IP is parameterized in lite mode

intel_vvp_scaler_get_debug_enabled

Prototype 
 bool intel_vvp_scaler_get_debug_enabled(intel_vvp_scaler_instance *instance);
Description

Returns the value of the DEBUG_ENABLED register. The instance must be a valid intel_vvp_scaler_instance fully initialized.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

true if the IP is parameterized with debug features enabled

intel_vvp_scaler_get_pixels_in_parallel

Prototype 
 uint8_t intel_vvp_scaler_get_pixels_in_parallel(intel_vvp_scaler_instance *instance);
Description

Returns the value of the PIXELS_IN_PARALLEL register. The instance must be a valid intel_vvp_scaler_instance fully initialized.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the pixel in parallel parameter (pixels transmitted per beat/clock cycle) used to generate the IP.

intel_vvp_scaler_get_max_input_width

Prototype 
 uint32_t intel_vvp_scaler_get_max_input_width(intel_vvp_scaler_instance *instance);
Description

Returns the value of the MAX_INPUT_WIDTH register. The instance must be a valid intel_vvp_scaler_instance fully initialized.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the maximum input width supported by the IP

intel_vvp_scaler_get_max_output_width

Prototype 
 uint32_t intel_vvp_scaler_get_max_output_width(intel_vvp_scaler_instance *instance);
Description

Returns the value of the MAX_OUTPUT_WIDTH register. The instance must be a valid intel_vvp_scaler_instance fully initialized.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the maximum output width supported by the IP

intel_vvp_scaler_get_scaling_algorithm

Prototype 
 eIntelVvpScalerAlgorithms intel_vvp_scaler_get_scaling_algorithm(intel_vvp_scaler_instance* instance);
Description

Returns the value of the SCALER_ALGORITHM register. The instance must be a valid intel_vvp_scaler_instance fully initialized.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

The scaling algorithm the IP is configured with

intel_vvp_scaler_is_coeffs_loading_enabled

Prototype 
 bool intel_vvp_scaler_is_coeffs_loading_enabled(intel_vvp_scaler_instance* instance);
Description

Returns the value of the COEFFS_RUNTIME_LOAD register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for polyphase scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

If the IP is configured to support run-time reloading of coefficients

intel_vvp_scaler_are_coeffs_preinitialized

Prototype 
 bool intel_vvp_scaler_are_coeffs_preinitialized(intel_vvp_scaler_instance* instance);
Description

Returns the value of the COEFFS_MEM_INIT register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for polyphase scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

If the IP is configured to start with initialized coefficients

intel_vvp_scaler_is_vertical_scaling_enabled

Prototype 
 bool intel_vvp_scaler_is_vertical_scaling_enabled (intel_vvp_scaler_instance* instance);
Description

Returns the value of the V_SCALING_ENABLED register. The instance must be a valid intel_vvp_scaler_instance fully initialized

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

If the IP is configured to perform vertical scaling

intel_vvp_scaler_get_num_vertical_taps

Prototype 
 uint8_t intel_vvp_scaler_get_num_vertical_taps(intel_vvp_scaler_instance* instance);
Description

Returns the value of the V_NUM_TAPS register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for vertical scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

The number of taps used for vertical scaling

intel_vvp_scaler_get_num_vertical_phases

Prototype 
 uint8_t intel_vvp_scaler_get_num_vertical_phases(intel_vvp_scaler_instance* instance);
Description

Returns the value of the V_NUM_PHASES register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for vertical scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

The number of taps used for vertical scaling

intel_vvp_scaler_get_num_vertical_banks

Prototype 
 uint8_t intel_vvp_scaler_get_num_vertical_banks(intel_vvp_scaler_instance* instance);
Description

Returns the value of the V_NUM_BANKS register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for vertical polyphase scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

The number of coefficient banks available for vertical scaling

intel_vvp_scaler_are_vertical_coeffs_signed

Prototype 
 bool intel_vvp_scaler_are_coeffs_signed(intel_vvp_scaler_instance* instance);
Description

Returns the value of the V_COEFFS_SIGNED register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for vertical polyphase scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

If signed coefficients have been enabled for vertical scaling at IP generation time

intel_vvp_scaler_get_vertical_coeffs_int_bits

Prototype 
 uint8_t intel_vvp_scaler_get_coeffs_int_bits (intel_vvp_scaler_instance *instance);
Description

Returns the value of the V_COEFFS_INT_BITS register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for vertical polyphase scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the number of integer bits, excluding sign bit, set at IP generation time to parameterize the quantization of the vertical scaling coefficients

intel_vvp_scaler_get_vertical_coeffs_frac_bits

Prototype 
 uint8_t intel_vvp_scaler_get_vertical_coeffs_frac_bits (intel_vvp_scaler_instance *instance);
Description

Returns the value of the V_COEFFS_FRAC_BITS register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for vertical polyphase scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the number of fractional bits set at IP generation time to parameterize the quantization of the vertical scaling coefficients

intel_vvp_scaler_is_horizontal_scaling_enabled

Prototype 
 bool intel_vvp_scaler_is_horizontal_scaling_enabled (intel_vvp_scaler_instance* instance);
Description

Returns the value of the H_SCALING_ENABLED register. The instance must be a valid intel_vvp_scaler_instance fully initialized

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

If the IP is configured to perform horizontal scaling

intel_vvp_scaler_get_num_horizontal_taps

Prototype 
 uint8_t intel_vvp_scaler_get_num_horizontal_taps(intel_vvp_scaler_instance* instance);
Description

Returns the value of the H_NUM_TAPS register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for horizontal scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

The number of taps used for horizontal scaling

intel_vvp_scaler_get_num_horizontal_phases

Prototype 
 uint8_t intel_vvp_scaler_get_num_horizontal_phases(intel_vvp_scaler_instance* instance);
Description

Returns the value of the H_NUM_PHASES register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for horizontal scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

The number of taps used for horizontal scaling

intel_vvp_scaler_get_num_horizontal_banks

Prototype 
 uint8_t intel_vvp_scaler_get_num_horizontal_banks(intel_vvp_scaler_instance* instance);
Description

Returns the value of the H_NUM_BANKS register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for horizontal polyphase scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

The number of coefficient banks available for horizontal scaling

intel_vvp_scaler_are_horizontal_coeffs_signed

Prototype 
 bool intel_vvp_scaler_are_coeffs_signed(intel_vvp_scaler_instance* instance);
Description

Returns the value of the H_COEFFS_SIGNED register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for horizontal polyphase scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

If signed coefficients have been enabled for horizontal scaling at IP generation time

intel_vvp_scaler_get_horizontal_coeffs_int_bits

Prototype 
 uint8_t intel_vvp_scaler_get_coeffs_int_bits (intel_vvp_scaler_instance *instance);
Description

Returns the value of the H_COEFFS_INT_BITS register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for horizontal polyphase scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the number of integer bits, excluding sign bit, set at IP generation time to parameterize the quantization of the horizontal scaling coefficients

intel_vvp_scaler_get_horizontal_coeffs_frac_bits

Prototype 
 uint8_t intel_vvp_scaler_get_horizontal_coeffs_frac_bits (intel_vvp_scaler_instance *instance);
Description

Returns the value of the H_COEFFS_FRAC_BITS register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for horizontal polyphase scaling

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the number of fractional bits set at IP generation time to parameterize the quantization of the horizontal scaling coefficients

intel_vvp_scaler_is_running

Prototype 
 bool intel_vvp_scaler_is_running(intel_vvp_scaler_instance* instance);
Description

Reads and returns the running bit of the STATUS register. The instance must be a valid intel_vvp_scaler_instance fully initialized.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

True is the IP is currently receiving/storing an input field, false when between two input fields

intel_vvp_scaler_get_commit_status

Prototype 
 bool intel_vvp_scaler_get_commit_status(intel_vvp_clipper_instance* instance);
Description

Reads and returns the commit pending bit of the STATUS register. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured in full mode.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

True is the IP is configured in full mode and if the agent interface contains uncommitted writes.

intel_vvp_scaler_get_status

Prototype 
 uint32_t intel_vvp_scaler_get_status(intel_vvp_scaler_instance* instance);
Description

Reads the STATUS register. The instance must be a valid intel_vvp_scaler_instance fully initialized.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

The content of the STATUS register

intel_vvp_scaler_set_output_width

Prototype 
 int intel_vvp_scaler_set_output_width(intel_vvp_scaler_instance *instance, uint32_t output_width)
Description

Selects the new output width. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for horizontal scaling. Also, the output width must be within the allowed range

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

output_width – new output width in the range [1..max_h_width-1] where max_h_width is the maximum configured output_width returned by intel_vvp_scaler_get_max_output_width

Returns

kIntelVvpCoreOk for success, negative error code in case of failures

kIntelVvpCoreInstanceErr if the instance is invalid or not configured for horizontal scaling

kIntelVvpScalerParameterErr if the new output width is out-of-range

intel_vvp_scaler_set_output_height

Prototype 
 int intel_vvp_scaler_set_output_height(intel_vvp_scaler_instance *instance, uint32_t output_height)
Description

Selects the new output height. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for vertical scaling.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

output_height – new output height

Returns

kIntelVvpCoreOk for success, negative error code in case of failures

kIntelVvpCoreInstanceErr if the instance is invalid or not configured for vertical scaling

intel_vvp_scaler_set_v_bank

Prototype 
 int intel_vvp_scaler_set_v_bank(intel_vvp_scaler_instance *instance, uint8_t bank);
Description

Selects the bank of vertical scaler coefficient to use. The instance must be a valid intel_vvp_scaler_instance, fully initialized, and configured for vertical polyphase scaling. Also, the bank of vertical coefficient should be valid

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

bank – the identifier for the horizontal bank in the range [0..num_v_banks-1] where v_num_banks is the value returned by intel_vvp_scaler_get_num_vertical_banks

Returns

kIntelVvpCoreOk for success, negative error code in case of failures

kIntelVvpCoreInstanceErr if the instance is invalid or not configured for vertical polyphase scaling

kIntelVvpScalerParameterErr if the vertical bank is invalid

intel_vvp_scaler_set_h_bank

Prototype 
 int intel_vvp_scaler_set_h_bank(intel_vvp_scaler_instance *instance, uint8_t bank);
Description

Selects the bank of horizontal scaler coefficient to use. The instance must be a valid intel_vvp_scaler_instance, fully initialized, and configured for horizontal polyphase scaling. Also, the bank of horizontal coefficient should be valid

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

bank – the identifier for the horizontal bank in the range [0..num_h_banks-1] where h_num_banks is the value returned by intel_vvp_scaler_get_num_horizontal_banks

Returns

kIntelVvpCoreOk for success, negative error code in case of failures

kIntelVvpCoreInstanceErr if the instance is invalid or not configured for horizontal polyphase scaling

kIntelVvpScalerParameterErr if the horizontal bank is invalid

intel_vvp_scaler_get_output_width

Prototype 
 uint32_t intel_vvp_scaler_get_output_width(intel_vvp_scaler_instance *instance)
Description

Returns the selected output width. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for horizontal scaling. Also, debug should be enabled to read a sensible value back

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the selected output width

intel_vvp_scaler_get_output_height

Prototype 
 uint32_t intel_vvp_scaler_get_output_height(intel_vvp_scaler_instance *instance)
Description

Returns the selected output height. The instance must be a valid intel_vvp_scaler_instance fully initialized and configured for vertical scaling. Also, debug should be enabled to read a sensible value back

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the selected output height

intel_vvp_scaler_get_v_bank

Prototype 
 uint8_t intel_vvp_scaler_get_v_bank(intel_vvp_scaler_instance *instance);
Description

Returns the selected bank of vertical scaling coefficient. The instance must be a valid intel_vvp_scaler_instance, fully initialized, and configured for vertical polyphase scaling. Also, debug must be enabled to read a sensible value back.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the selected vertical bank

intel_vvp_scaler_get_h_bank

Prototype 
 uint8_t intel_vvp_scaler_get_h_bank(intel_vvp_scaler_instance *instance);
Description

Returns the selected bank of horizontal scaling coefficient. The instance must be a valid intel_vvp_scaler_instance, fully initialized, and configured for horizontal polyphase scaling. Also, debug must be enabled to read a sensible value back.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

the selected horizontal bank

intel_vvp_scaler_set_quantized_coeffs

Prototype 
 int intel_vvp_scaler_set_quantized_coeffs(intel_vvp_scaler_instance* instance, bool h_coeffs, const int32_t* quantized_coeffs, uint8_t num_coeffs, uint8_t bank, uint8_t phase);
Description

Programs the IP with a new set of num_coeffs coefficients for the specified horizontal or vertical phase in the specified bank of coefficients. An error is returned if the IP is not properly configured to use these coefficients. The num_coeffs parameter indicates the guaranteed minimum size of the quantized_coeffs array and must match with the number of horizontal or vertical taps as appropriate. Also, the call checks for correctness of the quantized values and will return an error if invalid bits are set. Sign extension to the full 32 bit range is accepted. Quantization errors do not prevent the coefficients from being updated

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

h_coeffs – true if committing a set of horizontal coefficients, false for a set of vertical coefficients

quantized_coeffs – pointer to the structure containing the quantized coefficients

num_coeffs – the number of horizontal taps if h_coeffs is true, otherwise the number of vertical taps. The caller guarantees that the quantized_coeffs array is larger than the specified number of values

bank – the bank of coefficients used to commit the new set

phase – the phase for the set of new coefficients

Returns

kIntelVvpCoreOk in case of success, negative error code otherwise

kIntelVvpCoreInstanceErr if the instance is invalid, or not configured for horizontal/vertical polyphase scaling and run-time loading of coefficients

kIntelVvpScalerParameterErr if the phase, bank or number of coefficients are invalid for the IP configuration

kIntelVvpCoreNullPtrErr if quantized_coeffs is a NULL pointer

kIntelVvpScalerQuantizationErr if the quantized coefficients are out-of-range (this does not prevent the coefficients update)

intel_vvp_scaler_set_ coeffs

Prototype 
 int intel_vvp_scaler_set_coeffs(intel_vvp_scaler_instance* instance, bool h_coeffs, const float* quantized_coeffs, uint8_t num_coeffs, uint8_t bank, uint8_t phase);
Description

Programs the IP with a new set of num_coeffs coefficients for the specified horizontal or vertical phase in the specified bank of coefficients. Coefficients are quantized using the fixed-point configuration reported by the IP. An error is returned if the IP is not properly configured to use these coefficients. The num_coeffs parameter indicates the guaranteed minimum size of the coeffs array and must match with the number of horizontal or vertical taps as appropriate. An error is returned if the quantization could not be achieved successfully.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

h_coeffs – true if committing a set of horizontal coefficients, false for a set of vertical coefficients

coeffs – pointer to the structure containing the set of floating-point coefficients

num_coeffs – the number of horizontal taps if h_coeffs is true, otherwise the number of vertical taps. The caller guarantees that the quantized_coeffs array is larger than the specified number of values

bank – the bank of coefficients used to commit the new set

phase – the phase for the set of new coefficients

Returns

kIntelVvpCoreOk in case of success, negative error code otherwise

kIntelVvpCoreInstanceErr if the instance is invalid, or not configured for horizontal/vertical polyphase scaling and run-time loading of coefficients

kIntelVvpScalerParameterErr if the phase, bank or number of coefficients are invalid for the IP configuration

kIntelVvpCoreNullPtrErr if quantized_coeffs is a NULL pointer

kIntelVvpScalerQuantizationErr if the quantized coefficients are out-of-range (this does not prevent the coefficients update)

intel_vvp_scaler_commit_writes

Prototype 
 int intel_vvp_scaler_commit_writes(intel_vvp_scaler_instance* instance)
Description

Commits all pending writes before processing the next field. The instance must be valid and parameterized in full mode.

Arguments

instance – pointer to the intel_vvp_scaler_instance software driver instance structure

Returns

kIntelVvpCoreOk (0) for success, negative error code otherwise

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