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1.4.1. Creating the Qsys System
1.4.2. Creating the Transceiver Native PHY IP
1.4.3. Creating the Reconfiguration Controller
1.4.4. Creating the CMU PLL Using an Arria V Transceiver PLL
1.4.5. Creating a Fractional PLL (fPLL) using Altera PLL
1.4.6. Creating the Transceiver PHY Reset Controller
1.4.7. Creating a ROM that Contains the MIF for Reconfiguration
1.4.8. Compiling the Design Example
1.4.9. Creating In-System Sources and Probes (ISSP)
1.4.10. Performing Reconfiguration with the System Console Tool
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1.4.9. Creating In-System Sources and Probes (ISSP)
The ISSP is instantiated to control the PHY reset, enable serial loopback, and align word boundaries on received data.
The Qsys system communicates with the ISSP to control the Native PHY.
Bit |
ISSP |
Description |
---|---|---|
[2] |
rx_std_wa_patternalign | Aligns the word boundaries in manual alignment mode |
[1] |
rx_seriallpbken | Enables the serial loopback of the transceiver channel |
[0] |
hssi_reset | Used as a system reset |