AN 888: PHY Lite for Parallel Interfaces Reference Design with Dynamic Reconfiguration for Intel® Stratix® 10 Devices

ID 683220
Date 9/11/2020
Public
Document Table of Contents

1.7.1. Setting Up the Development Kit

Follow these steps to set up the Intel® Stratix® 10 GX FPGA development kit before running the reference design.
  1. Set the Intel® Stratix® 10 GX FPGA development kit switches to default position.
  2. Connect the HiLo loopback card on the HiLo memory interface.
  3. Connect the Intel® FPGA Download Cable to the Intel® Stratix® 10 GX FPGA development kit and your host machine.
    Figure 13.  Intel® Stratix® 10 GX FPGA Development Kit Board
  4. Click Tools > Programmer to program the <project directory> /phyllite_top.sof file into the Intel® Stratix® 10 GX FPGA development kit.