AN 888: PHY Lite for Parallel Interfaces Reference Design with Dynamic Reconfiguration for Intel® Stratix® 10 Devices

ID 683220
Date 9/11/2020
Public
Document Table of Contents

1.8. Document Revision History for AN 888: PHY Lite for Parallel Interfaces Reference Design with Dynamic Reconfiguration for Intel® Stratix® 10 Devices

Document Version Changes
2020.09.11 Updated the following figures:
  • General Tab Configuration for DUT_INPUT Module
  • Group 0 Tab Configuration for DUT_INPUT Module
  • General Tab Configuration for DUT_OUTPUT Module
  • Group 0 Tab Configuration for DUT_OUTPUT Module
2019.05.24 Initial release.