Visible to Intel only — GUID: sam1396857029541
Ixiasoft
1. Intel® MAX® 10 External Memory Interface Overview
2. Intel® MAX® 10 External Memory Interface Architecture and Features
3. Intel® MAX® 10 External Memory Interface Design Considerations
4. Intel® MAX® 10 External Memory Interface Implementation Guides
5. UniPHY IP References for Intel® MAX® 10 Devices
6. Intel® MAX® 10 External Memory Interface User Guide Archives
7. Document Revision History for the Intel® MAX® 10 External Memory Interface User Guide
2.1. Intel® MAX® 10 I/O Banks for External Memory Interface
2.2. Intel® MAX® 10 DQ/DQS Groups
2.3. Intel® MAX® 10 External Memory Interfaces Maximum Width
2.4. Intel® MAX® 10 Memory Controller
2.5. Intel® MAX® 10 External Memory Read Datapath
2.6. Intel® MAX® 10 External Memory Write Datapath
2.7. Intel® MAX® 10 Address/Command Path
2.8. Intel® MAX® 10 PHY Clock (PHYCLK) Network
2.9. Phase Detector for VT Tracking
2.10. On-Chip Termination
2.11. Phase-Locked Loop
2.12. Intel® MAX® 10 Low Power Feature
3.1. Intel® MAX® 10 DDR2 and DDR3 Design Considerations
3.2. LPDDR2 Design Considerations
3.3. Guidelines: Intel® MAX® 10 DDR3, DDR2, and LPDDR2 External Memory Interface I/O Limitation
3.4. Guidelines: Intel® MAX® 10 Board Design Requirement for DDR2, DDR3, and LPDDR2
3.5. Guidelines: Reading the Intel® MAX® 10 Pin-Out Files
Visible to Intel only — GUID: sam1396857029541
Ixiasoft
3.3. Guidelines: Intel® MAX® 10 DDR3, DDR2, and LPDDR2 External Memory Interface I/O Limitation
While implementing certain external memory interface standards, the number of I/O pins available is limited.
- While implementing DDR2—for 25 percent of the remaining I/O pins available in I/O banks 5 and 6, you can assign them only as input pins.
- While implementing DDR3 or LPDDR2—the I/O pins listed in the following table are not available for use. Of the remaining I/O pins, you can assign only 75 percent of the available I/O pins in I/O banks 5 and 6 for normal I/O operation.
Device | Package | |||
---|---|---|---|---|
F256 | U324 | F484 | F672 | |
10M16 |
N16 P16 |
R15 P15 R18 P18 E16 D16 |
U21 U22 M21 L22 F21 F20 E19 F18 |
— |
10M25 |
N16 P16 |
— |
U21 U22 M21 L22 F21 F20 E19 F18 F17 E17 |
— |
10M40 10M50 |
N16 P16 |
— |
U21 U22 M21 L22 F21 F20 E19 F18 F17 E17 |
W23 W24 U25 U24 T24 R25 R24 P25 K23 K24 J23 H23 G23 F23 G21 G22 |