Developer Guide

FPGA Optimization Guide for Intel® oneAPI Toolkits

ID 767853
Date 7/13/2023
Public

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Document Table of Contents

Pipes

Pipes are a first-in first-out (FIFO) buffer construct that provide links between elements of a design. The Intel® oneAPI DPC++/C++ Compiler provides the following types of pipes:

  • Host Pipes

    Host pipes connect a host and a device.

  • Cross-Kernel Pipes

    Cross-kernel pipes provide a mechanism for passing data between kernels and synchronizing kernels with high efficiency and low latency. Cross-kernel pipes allow kernels to communicate directly with each other using on-device FIFO buffers that are implemented using FPGA memory resources. The Intel® oneAPI DPC++/C++ Compiler supports concurrent kernel execution. Using cross-kernel pipes for data movement between concurrently executing kernels allows for data transfer without waiting for kernel completion, which can significantly increase the throughput of your design.

  • I/O Pipes

    An I/O pipe is a unidirectional (source or sink) connection to the hardware that may be connected to input or output features of an FPGA board. These features might include network interfaces, PCIe®, cameras, or other data capture or processing devices or protocols.