Developer Guide

FPGA Optimization Guide for Intel® oneAPI Toolkits

ID 767853
Date 7/13/2023
Public

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Document Table of Contents

Optimize Your Design

This chapter describes features and provides guidance on leveraging the functionalities of SYCL to optimize your designs.

In general, the methods you use to improve the performance of your kernels should achieve the following results:

  • Increase the number of parallel operations.
  • Increase the memory bandwidth of the implementation.
  • Increase the number of operations per clock cycle that kernels can perform in hardware.