Developer Guide

FPGA Optimization Guide for Intel® oneAPI Toolkits

ID 767853
Date 7/13/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

Operations with Explicit Precision Controls

The following operations leave the precision of the input ap_float-type variables untouched and allow you to control the output precision:

Rounding Mode Control For ap_float to ap_float Conversions

Syntax

convert_to<output_exponent_width, output_mantissa_width, rounding_mode>

Description

Use this method to override the rounding mode set for an ap_float variable when converting the variable to a different precision. By default, ap_float to ap_float conversions use the rounding mode that you specified when you declared the variable.

Multiplication

Syntax

ihc::ap_float<output_exponent_width, output_mantissa_width>::mul <[accuracy_setting], [subnormal_setting]> (ap_float_a, ap_float_b)

Description

This math function supplements the basic multiplication operation performed by the multiplication (*) operator. Multiplies ap_float_a and ap_float_b without changing the input types and outputs an ap_float at the specified precision. The optional parameters are defined as follows:

  • subnormal_setting: Optional parameter to specify whether input and output numbers are flushed to zero when carrying out basic binary operations explicitly. Set this parameter with one of the following values:
    subnormal_setting Parameter Values
    subnormal_setting Values Description
    ihc::fp_config::FP_Subnormal::ON Input and output numbers in the subnormal range are preserved. The target FPGA device must have subnormal support. Subnormal support might require more FPGA area.
    ihc::fp_config::FP_Subnormal::OFF Input or output numbers in the subnormal range are flushed to zero.
    ihc::fp_config::FP_Subnormal::AUTO With this setting, the Intel® oneAPI DPC++/C++ Compiler enables subnormal support only under the folllowing conditions:
    • The target FPGA device directly supports it.
    • It does not incur any extra FPGA area overhead.

    If you do not set the subnormal_setting parameter, the ihc::fp_config::FP_Subnormal::AUTO subnormal setting is used by default.

  • accuracy_setting: Optional parameter that influences trade-offs between the accuracy of the result due to different rounding decisions in the intermediary calculations and the FPGA area utilized by the generated hardware. Floating-point operations with less accurate results typically use fewer logic elements. For example, a divider with a high accuracy might use 20% more FPGA area than a divider with low accuracy. The low accuracy divider has a higher error bound [1 unit of least precision (ULP)] than a high accuracy divider (0.5 ULP).

    Set this parameter with one of the following values:

    accuracy_setting Parameter Values
    accuracy_setting Values Description
    ihc::fp_config::FP_Accuracy::HIGH

    Uses the high precision version of the floating-point math operations. This is the default setting.

    ihc::fp_config::FP_Accuracy::LOW Allows the compiler to use a higher error bound to save on-chip area.

    If you do not set the accuracy_setting parameter, ihc::fp_config::FP_Accuracy::HIGH accuracy setting is used by default.

Addition/Subtraction/Division

Syntax

ihc::ap_float<output_exponent_width, output_mantissa_width>::add <[optional parameters]> (ap_float_a, ap_float_b) 
ihc::ap_float<output_exponent_width, output_mantissa_width>::sub <[optional parameters]> (ap_float_a, ap_float_b) 
ihc::ap_float<output_exponent_width, output_mantissa_width>::div <[optional parameters]> (ap_float_a, ap_float_b)

Description

These math functions supplement the basic math operations performed by the addition/subtraction/division (+ / //) operators. Adds/subtracts/divides ap_float_a and ap_float_b by first casting ap_float_a and ap_float_b to the specified ap_float precision. The operation and output are at the specified precision.

You can also specify the optional parameters accuracy_setting and subnormal_setting described earlier.

NOTE:

If your SYCL code performs computations on constant/literal native floating-point values, the compiler can sometimes combine them at compile time and save area. This is a compiler optimization technique called constant folding or constant propagation. This optimization does not work for ap_float even when the operands are constant. You should compute your constant arithmetic in native types or precompute manually.