Agilex™ 3 FPGAs and SoCs Device Overview

ID 817231
Date 9/23/2024
Public
Document Table of Contents

12.3. GTS Transceiver PLL in Agilex™ 3 FPGAs and SoCs

There are two types of PLL in the Agilex™ 3 FPGA GTS transceiver.
Table 18.  Types of Agilex™ 3 FPGA GTS Transceiver PLL
PLL Type Description
TX PLL
  • Four TX PLL per bank or one TX PLL per GTS transceiver channel
  • LC tank-based PLL with precise fractional synthesis and ultra-low jitter
  • Supports transceiver interfaces
  • Dedicated for GTS transceiver usage
System PLL
  • One System PLL per bank
  • Supports only integer mode with precise frequency synthesis
  • Supports transceiver-to-fabric interfaces
  • If you do not use the System PLL for the GTS transceivers, you can repurpose this PLL for core fabric usage