Device Configuration User Guide: Agilex™ 5 FPGAs and SoCs

ID 813773
Date 7/24/2024
Public
Document Table of Contents

8. Document Revision History for the Device Configuration User Guide: Agilex™ 5 FPGAs and SoCs

Document Version Quartus® Prime Version Changes
2024.07.24 24.2 Updated the text at the following locations to redefine I/O pins in question and the VCCIO_PIO voltage.
  • The Power-On, Configuration, and Reconfiguration Timing Diagram diagram in the Agilex™ 5 Configuration Timing Diagram section.
  • Last bullet point under Power-On in the Configuration Flow Diagram section.
2024.07.08 24.2
  • Added new section Agilex™ 5 Configuration Time Estimation.
  • Added information for supported generic QSPI flash controllers in the Understanding Quad SPI Flash Byte-Addressing section.
  • Added new section CRAM Integrity Check Feature.
2024.04.01 24.1 Initial release.