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4.6.1. Launching and Setting Up the Fault Injection Debugger
4.6.2. Configuring Your Device using a Software Object File (.sof)
4.6.3. Constraining Regions for Fault Injection
4.6.4. Injecting Errors to Predefined Safe Locations
4.6.5. Blowing Fuse Bit to Enable Injecting All Error Types
4.6.6. Injecting Errors to Random Locations
4.6.7. Injecting Errors to Specific Locations
4.6.8. Injecting Double Adjacent Errors
4.6.9. Injecting SDM ECC Errors
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2.4.1.2. On-Chip Lookup Sensitivity Processing
For the on-chip sensitivity processing, the Advanced SEU Detection Intel® FPGA IP reads the error message queue content and then compares single-bit error locations with a sensitivity map. This check determines whether or not the failure affects the device operation.
Figure 2. System Overview for On-Chip Lookup Sensitivity Processing with Advanced SEU Detection Intel® FPGA IP
Figure 3. Process Flow for On-Chip Lookup Sensitivity Processing