Agilex™ 7 FPGA M-Series HBM2e Development Kit User Guide

ID 782461
Date 12/04/2024
Public
Document Table of Contents

4.3.1. Si5391-1

Figure 22. Si5391-1

The following sections describe the Clock Controller buttons.

Read

Reads the current frequency setting for the oscillator associated with the active tab.

Default

Sets the frequency for the oscillator associated with the active tab back to its default value. This can also be accomplished by power cycling the board.

Set

Sets the programmable oscillator frequency for the selected clock to the value in the OUTx output controls for Si5391. Frequency changes might take several milliseconds to take effect. You might see glitches on the clock during this time. Intel recommends resetting the FPGA logic after changing frequencies.

Import

You can generate the register list from the Skyworks* ClockBuilder Pro tool and import it into Si5391 to update the settings of the output clocks. Register changes are volatile after power cycling.