Agilex™ 7 FPGA M-Series HBM2e Development Kit User Guide

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ID 782461
Date 12/04/2024
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Board Test System 5. Development Kit Hardware and Configuration 6. Custom Projects for the Development Kit 7. Document Revision History for the Agilex™ 7 FPGA M-Series HBM2e Development Kit User Guide A. Development Kit Components B. Developer Resources C. Safety and Regulatory Compliance Information
1. Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Box Contents 1.4. Recommended Operating Conditions
2. Getting Started x
2.1. Before You Begin 2.2. Handling the Board 2.3. Quartus® Prime Software and Driver Installation
2.3. Quartus® Prime Software and Driver Installation x
2.3.1. Installing the Quartus® Prime Pro Edition Software 2.3.2. Installing the Intel® SoC EDS 2.3.3. Installing the Development Kit 2.3.4. Installing the Intel® FPGA Download Cable Driver
3. Development Kit Setup x
3.1. Default Settings 3.2. Powering Up the Development Kit 3.3. Performing Board Restore
3.3. Performing Board Restore x
3.3.1. Restoring Board QSPI Flash with Default Factory Image
4. Board Test System x
4.1. Set Up the BTS GUI Running Environment 4.2. Test the Functionality of the Development Kit 4.3. Control the On-board Clock through Clock Controller GUI 4.4. Monitor On-Board Power Regulator through Power Monitor GUI 4.5. Identify Test Pass or Fail-based on BTS GUI Test Status
4.1. Set Up the BTS GUI Running Environment x
4.1.1. Downloading OpenJDK 4.1.2. Downloading OpenJFX 4.1.3. Installing OpenJDK and OpenJFX 4.1.4. Setting Up the Quartus® Prime Software for BTS Operation 4.1.5. Running the BTS GUI
4.2. Test the Functionality of the Development Kit x
4.2.1. The Bottom Information Bar 4.2.2. The Configure Menu 4.2.3. The Sys Info Tab 4.2.4. The GPIO Tab 4.2.5. Transceiver Designs
4.2.5. Transceiver Designs x
4.2.5.1. The QSFPDD NRZ Tab 4.2.5.2. The QSFPDD PAM4 Tab 4.2.5.3. The FMC+ NRZ Tab 4.2.5.4. The QSFPDD800 PAM4 Tab
4.3. Control the On-board Clock through Clock Controller GUI x
4.3.1. Si5391-1 4.3.2. Si5391-2 4.3.3. Si5392 4.3.4. Si5395 4.3.5. Si5332 4.3.6. Si5518
5. Development Kit Hardware and Configuration x
5.1. Configuring FPGA and Accessing HPS Debug Access Port by JTAG 5.2. Configuring FPGA Device Using the Avalon® Streaming Interface x8 Configuration Mode 5.3. Daughter Card
5.3. Daughter Card x
5.3.1. HPS Out of Box Experience (OOBE) Daughter Card
6. Custom Projects for the Development Kit x
6.1. Add SmartVID Settings in the Quartus® Prime QSF File 6.2. Golden Top
A. Development Kit Components x
A.1. Power A.2. Clocks A.3. General Input/Output A.4. Memory Interfaces A.5. Communication Interfaces A.6. Daughter Card A.7. Connectors and Cables
C. Safety and Regulatory Compliance Information x
C.1. Safety and Regulatory Information C.2. Compliance Information
C.1. Safety and Regulatory Information x
C.1.1. Safety Warnings C.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Development Kit Setup
4. Board Test System
5. Development Kit Hardware and Configuration
6. Custom Projects for the Development Kit
7. Document Revision History for the Agilex™ 7 FPGA M-Series HBM2e Development Kit User Guide
A. Development Kit Components
B. Developer Resources
C. Safety and Regulatory Compliance Information

4.1. Set Up the BTS GUI Running Environment

You need to download and install Java runtime environment and Quartus® Prime software on your systems to run the BTS GUI, including the Power Monitor and Clock Controller GUI. Java runtime environment includes OpenJDK and OpenJFX, whose installation is a one-time procedure. If you have completed it before, you do not need to do it again unless the Java version upgrade is needed.


Section Content
Downloading OpenJDK
Downloading OpenJFX
Installing OpenJDK and OpenJFX
Setting Up the Quartus Prime Software for BTS Operation
Running the BTS GUI

Level Two Title