Agilex™ 7 Device Family Pin Connection Guidelines: M-Series

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ID 776197
Date 6/12/2024
Public
Document Table of Contents
Document Table of Contents x
1. Agilex™ 7 Device Family Pin Connection Guidelines: M-Series
1. Agilex™ 7 Device Family Pin Connection Guidelines: M-Series x
1.1. Pins Status for Agilex™ 7 M-Series Devices 1.2. Agilex™ 7 M-Series FPGA Core Pins 1.3. Agilex™ 7 M-Series HBM2E Pins 1.4. Agilex™ 7 M-Series F-Tile Pins 1.5. Agilex™ 7 M-Series R-Tile Pins 1.6. Agilex™ 7 M-Series Hard Processor System (HPS) Pins 1.7. Agilex™ 7 M-Series Power Supply Sharing Guidelines 1.8. Notes to Agilex™ 7 M-Series Device Family Pin Connection Guidelines 1.9. Document Revision History for the Agilex™ 7 Device Family Pin Connection Guidelines: M-Series
1.2. Agilex™ 7 M-Series FPGA Core Pins x
1.2.1. Clock and PLL Pins 1.2.2. Dedicated Configuration/JTAG Pins 1.2.3. Optional/Dual-Purpose Configuration Pins 1.2.4. Differential I/O Pins 1.2.5. External Memory Interface Pins 1.2.6. Voltage Sensor and Voltage Reference Pins 1.2.7. Remote Temperature Sensing Diode Pins 1.2.8. Reference Pins 1.2.9. No Connect and DNU Pins 1.2.10. Power Supply Pins 1.2.11. Secure Device Manager (SDM) Pins 1.2.12. Secure Device Manager (SDM) Optional Signal Pins
1.3. Agilex™ 7 M-Series HBM2E Pins x
1.3.1. HBM2E Power Supply Pins 1.3.2. HBM2E Signal Pins
1.4. Agilex™ 7 M-Series F-Tile Pins x
1.4.1. F-Tile Power Supply Pins 1.4.2. F-Tile Transceiver Pins
1.5. Agilex™ 7 M-Series R-Tile Pins x
1.5.1. R-Tile Power Supply Pins 1.5.2. R-Tile Transceiver Pins
1.6. Agilex™ 7 M-Series Hard Processor System (HPS) Pins x
1.6.1. HPS Supply Pins 1.6.2. HPS Oscillator Clock Input Pin 1.6.3. HPS JTAG Pins 1.6.4. HPS GPIO Pins 1.6.5. HPS SDMMC Pins 1.6.6. HPS NAND Pins 1.6.7. HPS USB Pins 1.6.8. HPS EMAC Pins 1.6.9. HPS I2C_EMAC and MDIO Pins 1.6.10. HPS I2C Pins 1.6.11. HPS SPI Pins 1.6.12. HPS UART Pins 1.6.13. HPS Trace Pins
1.7. Agilex™ 7 M-Series Power Supply Sharing Guidelines x
1.7.1. Example 1— Agilex™ 7 M-Series Devices with R-Tile, F-Tile and HBM2E Using DDR4 1.7.2. Example 2— Agilex™ 7 M-Series Devices with R-Tile, F-Tile and HBM2E Using DDR5 1.7.3. Example 3— Agilex™ 7 M-Series Devices with R-Tile and F-Tile, Without HBM2E Using DDR4 1.7.4. Example 4— Agilex™ 7 M-Series Devices with F-Tile only and HBM2E Using DDR4 1.7.5. Example 5— Agilex™ 7 M-Series Devices with F-Tile only and HBM2E Using DDR5 1.7.6. Example 6— Agilex™ 7 M-Series Devices with F-Tile only and Without HBM2E Using DDR5
1. Agilex™ 7 Device Family Pin Connection Guidelines: M-Series

1.9. Document Revision History for the Agilex™ 7 Device Family Pin Connection Guidelines: M-Series

Document Version Changes
2024.06.12
  • Updated the connection guidelines for the HPS_COLD_nRESET pin.
  • Updated the connection guidelines for the FGT[L,R]_RX_Q[0,1,2,3]_CH[0,1,2,3]P and FGT[L,R]_RX_Q[0,1,2,3]_CH[0,1,2,3]N pins.
2024.04.01
  • Updated the connection guidelines of the VCCRCORE pin.
  • Corrected the regulator sharing for the VCCIO_PIO_T/B pin to Isolate in Table: Power Supply Sharing Guidelines for Agilex™ 7 M-Series Devices with F-Tile Transceivers only and HBM2E, Using DDR5 and Table: Power Supply Sharing Guidelines for Agilex™ 7 M-Series Devices with F-Tile Transceivers only, Without HBM2E Using DDR5.
  • Made editorial edits throughout the document.
2023.12.04
  • Updated the connection guidelines of the HPS_COLD_nRESET pin.
  • Updated the connection guidelines of the HPS_OSC_CLK pin.
  • Updated the connection guidelines of the JTAG_TCK pin.
  • Updated the connection guidelines of the JTAG_TMS pin.
  • Updated the connection guidelines of the JTAG_TDO pin.
  • Updated the connection guidelines of the JTAG_TDI pin.
  • Updated the connection guidelines of the GPIO0_IO[0..23] and GPIO1_IO[0..23] pins.
2023.09.27 Updated the connection guidelines of the VCCH_SDM pin.
2023.06.26 Initial release.
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