5.1.8. Source Audio Encoder

HDMI Intel® FPGA IP User Guide

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Date 10/02/2023

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5.1.8. Source Audio Encoder

Audio transport allows four packet types:

Audio Clock Regeneration
Audio InfoFrame
Audio Metadata
Audio Sample

The Audio Clock Regeneration packet contains the CTS and N values.

Note: You need to provide these values as recommended in HDMI 1.4b Specification, Section 7.2.1 through 7.2.3 and HDMI 2.0b Specification, Section 9.2.1 for TMDS mode and HDMI 2.1 Specification, Section 9.2.2 for FRL mode.

The core schedules this packet to be sent every ms. The timestamp scheduler uses the audio_clk and N value to determine a 1-ms interval. The audio data queues on a DCFIFO. The core also uses the DCFIFO to synchronize its clock to ls_clk when you turn off Support FRL and synchronized to vid_clk when you turn on Support FRL. The Audio Packetizer packs the audio data into the Audio Sample packets according to the specified audio format (as described in HDMI 1.4b Specification Section 5.3.4). An Audio Sample packet can contain up to 4 audio samples, based on the required audio sample clock. The core sends the Audio Sample packets whenever there is an available slot in the auxiliary packet stream.

The core determines the payload data packet type from the audio_format[3:0] signal.

Table 27. Definition of the Supported audio_format[3:0]
Value	Name	Description
0	Linear Pulse-Code Modulation (LPCM)	Use packet type 0x02 to transport payload data
4	3D Audio (LPCM)	Use packet type 0x0B to transport payload data
6	Multi-Stream(MST) Audio for LPCM	Use packet type 0x0E to transport payload data
Others	–	Reserved

The 32-bit audio data is packed in IEC-60958 standard. The least significant word is the left channel sample.

Figure 24. Audio Data Packing

The audio_data port is always at a fixed value of 256 bits. In the LPCM format, the core can send up to 8 channels of audio data.

Channel 1 audio data should be present at audio_data[31:0].
Channel 2 audio data should be present at audio_data[63:32] and so on.

The Sample Present (SP) bit determines whether to use 2-channel or 8-channel layout. If one or more SP bit from Channel 2-7 is high, then the core uses the 8-channel layout. Otherwise, the core uses the 2-channel layout. The core ignores all other fields if the SP bit is 0.

The core requires an audio_de port for designs in which the audio_clk port frequency is higher than the actual audio sample clock. The audio_de port qualifies the audio data. If audio_clk is the actual audio sample clock, you can tie the audio_de signal to 1. For audio channels fewer than 8, insert 0 to the respective audio data of the unused audio channels.

The Audio Clock Regeneration and Audio Sample packets on the Auxiliary Data Port are not filtered by the core. You must filter these packets externally if you want to loop back the auxiliary data stream from the sink.

3D Audio Format

In 3D format, the core sends up to 32 channels audio data by consuming up to 4 writes of 8 channels. Assert audio_format[4] to indicate the first 8 channels of each sample. For audio channels greater than 8, do not drive audio_clk at actual audio sample clock; instead drive audio_clk with ls_clk and qualify audio_data with audio_de.

Figure 25. 3D Audio Input ExampleThe following figure shows the three examples of 3D audio: Full 32 channels, 24 channels, and 12 channels. In the 12 channels example, the 4 most significant audio channels of the last beat are zero.

MST Audio Format

In MST format, the core sends 2, 3, or 4 streams of audio. For audio streams fewer than 4, you must set the respective audio data to zero for the unused streams as shown in the figure below.

Figure 26. MST Audio Input Example

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