HDMI Intel® FPGA IP User Guide

ID 683798
Date 10/02/2023
Public

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6.1.16. I2C Slave

The core includes a pair of I2C slaves when you turn on the Include I2C Master/Slave parameter.
  • One slave is for the EDID address (0x50).

    You need to instantiate a separate memory (ROM/RAM) to interface with this slave. The HDMI IP also has an optional feature to include a RAM for EDID.

  • The other slave is for the SCDC address (0x54).

    The I2C slave for the SCDC will be directly interfaced with the HDMI core for the SCDC registers operation.

The Include I2C Pads parameter enables the instantiation of open-drain driver pads in the IP core component. If this parameter is turned off, then these pads must be included at the system top-level.