Intel® Arria® 10 Device Datasheet

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ID 683771
Date 2/14/2022
Public
Document Table of Contents
Document Table of Contents x
Intel® Arria® 10 Device Datasheet
Intel® Arria® 10 Device Datasheet x
Electrical Characteristics Switching Characteristics Configuration Specifications I/O Timing Programmable IOE Delay Glossary Document Revision History for the Intel® Arria® 10 Device Datasheet
Electrical Characteristics x
Operating Conditions
Operating Conditions x
Absolute Maximum Ratings Maximum Allowed Overshoot and Undershoot Voltage Recommended Operating Conditions DC Characteristics I/O Standard Specifications
Recommended Operating Conditions x
Recommended Operating Conditions Transceiver Power Supply Operating Conditions HPS Power Supply Operating Conditions
DC Characteristics x
Supply Current and Power Consumption I/O Pin Leakage Current Bus Hold Specifications OCT Calibration Accuracy Specifications OCT Without Calibration Resistance Tolerance Specifications Pin Capacitance Internal Weak Pull-Up and Weak Pull-Down Resistor
I/O Standard Specifications x
Single-Ended I/O Standards Specifications Single-Ended SSTL, HSTL, and HSUL I/O Reference Voltage Specifications Single-Ended SSTL, HSTL, and HSUL I/O Standards Signal Specifications Differential SSTL I/O Standards Specifications Differential HSTL and HSUL I/O Standards Specifications Differential I/O Standards Specifications
Switching Characteristics x
Transceiver Performance Specifications Core Performance Specifications Periphery Performance Specifications HPS Specifications
Transceiver Performance Specifications x
Transceiver Performance for Intel® Arria® 10 GX/SX Devices High-Speed Serial Transceiver-Fabric Interface Performance for Intel® Arria® 10 GX/SX Devices Transceiver Performance for Intel® Arria® 10 GT Devices High-Speed Serial Transceiver-Fabric Interface Performance for Intel® Arria® 10 GT Devices Transceiver Specifications for Intel® Arria® 10 GX, SX, and GT Devices
Core Performance Specifications x
Clock Tree Specifications PLL Specifications DSP Block Specifications Memory Block Specifications Temperature Sensing Diode Specifications Internal Voltage Sensor Specifications
PLL Specifications x
Fractional PLL Specifications I/O PLL Specifications
Temperature Sensing Diode Specifications x
Internal Temperature Sensing Diode Specifications External Temperature Sensing Diode Specifications
Periphery Performance Specifications x
High-Speed I/O Specifications DPA Lock Time Specifications LVDS Soft-CDR/DPA Sinusoidal Jitter Tolerance Specifications Memory Standards Supported by the Hard Memory Controller Memory Standards Supported by the Soft Memory Controller Memory Standards Supported by the HPS Hard Memory Controller DLL Range Specifications DQS Logic Block Specifications Memory Output Clock Jitter Specifications OCT Calibration Block Specifications
HPS Specifications x
HPS Reset Input Requirements HPS Clock Performance HPS PLL Specifications Quad SPI Flash Timing Characteristics SPI Timing Characteristics SD/MMC Timing Characteristics USB ULPI Timing Characteristics Ethernet Media Access Controller (EMAC) Timing Characteristics I2C Timing Characteristics NAND Timing Characteristics Trace Timing Characteristics GPIO Interface
HPS PLL Specifications x
HPS PLL Input Requirements HPS PLL Performance HPS PLL Output Specifications
Configuration Specifications x
POR Specifications JTAG Configuration Timing FPP Configuration Timing AS Configuration Timing DCLK Frequency Specification in the AS Configuration Scheme PS Configuration Timing Initialization Configuration Files Minimum Configuration Time Estimation Remote System Upgrades User Watchdog Internal Circuitry Timing Specifications
FPP Configuration Timing x
DCLK-to-DATA[] Ratio (r) for FPP Configuration FPP Configuration Timing when DCLK-to-DATA[] = 1 FPP Configuration Timing when DCLK-to-DATA[] >1
Intel® Arria® 10 Device Datasheet

DSP Block Specifications

Table 40.  DSP Block Performance Specifications for Intel® Arria® 10 Devices (VCC and VCCP at 0.9 V Typical Value)
Mode Performance Unit
–E1S, –E1H –I1S, –I1H –E2L, –E2S –I2L, –I2S –E3S, –E3V –I3S, –I3V
Fixed-point 18 × 19 multiplication mode 548 528 456 438 364 346 MHz
Fixed-point 27 × 27 multiplication mode 541 522 450 434 358 344 MHz
Fixed-point 18 × 18 multiplier adder mode 548 529 459 440 370 351 MHz
Fixed-point 18 × 18 multiplier adder summed with 36-bit input mode 539 517 444 422 349 326 MHz
Fixed-point 18 × 19 systolic mode 548 529 459 440 370 351 MHz
Complex 18 × 19 multiplication mode 548 528 456 438 364 346 MHz
Floating point multiplication mode 548 527 447 427 347 326 MHz
Floating point adder or subtract mode 488 471 388 369 288 266 MHz
Floating point multiplier adder or subtract mode 483 465 386 368 290 270 MHz
Floating point multiplier accumulate mode 510 490 418 393 326 294 MHz
Floating point vector one mode 502 482 404 382 306 282 MHz
Floating point vector two mode 474 455 383 367 293 278 MHz
Table 41.  DSP Block Performance Specifications for Intel® Arria® 10 Devices (VCC and VCCP at 0.95 V Typical Value)
Mode Performance Unit
–I1S, –I1H –I2L, –I2S
Fixed-point 18 × 19 multiplication mode 635 517 MHz
Fixed-point 27 × 27 multiplication mode 633 517 MHz
Fixed-point 18 × 18 multiplier adder mode 635 516 MHz
Fixed-point 18 × 18 multiplier adder summed with 36-bit input mode 631 509 MHz
Fixed-point 18 × 19 systolic mode 635 516 MHz
Complex 18 × 19 multiplication mode 635 517 MHz
Floating point multiplication mode 635 501 MHz
Floating point adder or subtract mode 564 468 MHz
Floating point multiplier adder or subtract mode 564 475 MHz
Floating point multiplier accumulate mode 581 482 MHz
Floating point vector one mode 574 471 MHz
Floating point vector two mode 550 450 MHz
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