E-Tile Transceiver PHY User Guide

ID 683723
Date 7/08/2024
Public

Visible to Intel only — GUID: qdi1630715616464

Ixiasoft

Document Table of Contents

10.3. Modifying the Design to Enable E-Tile Transceiver Debug

To enable debugging capabilities, you must change the parameters of one or more of the E-tile transceiver Intel® FPGA IP cores.