Visible to Intel only — GUID: jgk1507122653807
Ixiasoft
1. Intel® Stratix® 10 SEU Mitigation Overview
2. Intel® Stratix® 10 Mitigation Techniques for CRAM
3. Secure Device Manager ECC Error Detection
4. Intel® Stratix® 10 SEU Mitigation Implementation Guides
5. Advanced SEU Detection Intel® FPGA IP References
6. Intel® Stratix® 10 Fault Injection Debugger References
7. Intel® Stratix® 10 SEU Mitigation User Guide Archives
8. Document Revision History for the Intel® Stratix® 10 SEU Mitigation User Guide
4.1. Setting SEU_ERROR Pin
4.2. Intel® Quartus® Prime SEU Software Settings
4.3. Enabling Priority Scrubbing
4.4. Performing Hierarchy Tagging
4.5. Programming Sensitivity Map Header File into Memory
4.6. Performing Lookup for Sensitivity Map Header
4.7. Using the Fault Injection Debugger
4.8. Analyzing SEU Errors Using Signal Tap
4.9. Intel® Quartus® Prime Software SEU FIT Reports
Visible to Intel only — GUID: jgk1507122653807
Ixiasoft
4.7. Using the Fault Injection Debugger
To enable the fault injection feature, you must first enable it in your design. After the feature is enabled, launch and set up the Fault Injection Debugger tool.
Note: The Fault Injection Debugger does not support injecting SDM ECC error in Intel® Stratix® 10 devices.
Note: To use the tool, the Fault Injection Debugger license is required.