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1. Intel® Stratix® 10 SEU Mitigation Overview
2. Intel® Stratix® 10 Mitigation Techniques for CRAM
3. Secure Device Manager ECC Error Detection
4. Intel® Stratix® 10 SEU Mitigation Implementation Guides
5. Advanced SEU Detection Intel® FPGA IP References
6. Intel® Stratix® 10 Fault Injection Debugger References
7. Intel® Stratix® 10 SEU Mitigation User Guide Archives
8. Document Revision History for the Intel® Stratix® 10 SEU Mitigation User Guide
4.1. Setting SEU_ERROR Pin
4.2. Intel® Quartus® Prime SEU Software Settings
4.3. Enabling Priority Scrubbing
4.4. Performing Hierarchy Tagging
4.5. Programming Sensitivity Map Header File into Memory
4.6. Performing Lookup for Sensitivity Map Header
4.7. Using the Fault Injection Debugger
4.8. Analyzing SEU Errors Using Signal Tap
4.9. Intel® Quartus® Prime Software SEU FIT Reports
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4.1. Setting SEU_ERROR Pin
To set the SEU_ERROR pin function in the Intel® Quartus® Prime software, perform the following steps:
- On the Assignments menu, click Device.
- In the Device and Pin Options select the Configuration category and click Configuration Pins Options.
- In the Configuration Pin window, turn-on the USE SEU_ERROR output.
- Select any unused SDM pin from the drop-down selection to implement the SEU_ERROR pin function.
- Click OK to confirm and close the Configuration Pin window.