Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 7/08/2024
Public
Document Table of Contents

3.3.1. Operational Modes

The Quartus® Prime software includes IP cores that you can use to control the operation mode of the multipliers. After entering the parameter settings with the IP Catalog, the Quartus® Prime software automatically configures the variable precision DSP block.

Variable-precision DSP block can also be implemented using DSP Builder for Altera FPGAs and OpenCL™.

Table 20.  Operational Modes
Fixed-Point Arithmetic Floating-Point Arithmetic

Altera provides two methods for implementing various modes of the Arria® 10 variable precision DSP block in a design—using the Quartus® Prime DSP IP core and HDL inferring.

The following Quartus® Prime IP cores are supported for the Arria® 10 variable precision DSP blocks in the fixed-point arithmetic implementation:
  • Intel FPGA Multiply Adder
  • ALTMULT_COMPLEX
  • Arria® 10 Native Fixed Point DSP IP core
Altera provides one method for implementing various modes of the Arria® 10 variable precision DSP block in a design—using the Quartus® Prime DSP IP core.
The following Quartus® Prime IP cores are supported for the Arria® 10 variable precision DSP blocks in the floating-point arithmetic implementation:
  • ALTERA_FP_FUNCTIONS
  • Arria® 10 Native Floating Point DSP IP core