Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 7/08/2024
Public
Document Table of Contents

4. Clock Networks and PLLs in Arria® 10 Devices

This chapter describes the advanced features of hierarchical clock networks and phase-locked loops (PLLs) in Arria® 10 devices. The Quartus® Prime software enables the PLLs and their features without external devices.