Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 7/08/2024
Public
Document Table of Contents

5.4.2.1. FPGA I/O Resources in Arria® 10 GX Packages

Table 34.  GPIO Buffers and LVDS Channels in Arria® 10 GX Devices
  • The U19 package is a ball grid array with 0.8 mm pitch. All other packages are ball grid arrays with 1.0 mm pitch.
  • The number of LVDS channels does not include dedicated clock pins.
Product Line Package GPIO LVDS Channels
Code Type 3 V I/O LVDS I/O Total
GX 160 U19 484-pin UBGA 48 148 196 74
F27 672-pin FBGA 48 192 240 96
F29 780-pin FBGA 48 240 288 120
GX 220 U19 484-pin UBGA 48 148 196 74
F27 672-pin FBGA 48 192 240 96
F29 780-pin FBGA 48 240 288 120
GX 270 F27 672-pin FBGA 48 192 240 96
F29 780-pin FBGA 48 312 360 156
F34 1,152-pin FBGA 48 336 384 168
F35 1,152-pin FBGA 48 336 384 168
GX 320 F27 672-pin FBGA 48 192 240 96
F29 780-pin FBGA 48 312 360 156
F34 1,152-pin FBGA 48 336 384 168
F35 1,152-pin FBGA 48 336 384 168
GX 480 F29 780-pin FBGA 48 312 360 156
F34 1,152-pin FBGA 48 444 492 222
F35 1,152-pin FBGA 48 348 396 174
GX 570 F34 1,152-pin FBGA 48 444 492 222
F35 1,152-pin FBGA 48 348 396 174
NF40 1,517-pin FBGA 48 540 588 270
KF40 1,517-pin FBGA 96 600 696 300
GX 660 F34 1,152-pin FBGA 48 444 492 222
F35 1,152-pin FBGA 48 348 396 174
NF40 1,517-pin FBGA 48 540 588 270
KF40 1,517-pin FBGA 96 600 696 300
GX 900 F34 1,152-pin FBGA 0 504 504 252
NF40 1,517-pin FBGA 0 600 600 300
RF40 1,517-pin FBGA 0 342 342 154
NF45 1,932-pin FBGA 0 768 768 384
SF45 1,932-pin FBGA 0 624 624 312
UF45 1,932-pin FBGA 0 480 480 240
GX 1150 F34 1,152-pin FBGA 0 504 504 252
NF40 1,517-pin FBGA 0 600 600 300
RF40 1,517-pin FBGA 0 342 342 154
NF45 1,932-pin FBGA 0 768 768 384
SF45 1,932-pin FBGA 0 624 624 312
UF45 1,932-pin FBGA 0 480 480 240