High Bandwidth Memory (HBM2) Interface Intel® FPGA IP Design Example User Guide

ID 683379
Date 4/13/2020
Public
Document Table of Contents

3. High Bandwidth Memory (HBM2) Interface Intel FPGA IP Design Example Description

When you parameterize the High Bandwidth Memory (HBM2) Interface Intel FPGA IP, you can have the system generate simulation and synthesis file sets, by selecting Simulation or Synthesis under Example Design Files on the Example Designs tab.

The system creates a complete file set for simulation or for synthesis, in accordance with your selection.