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1.1. Migration Considerations
1.2. Software Migration Guidelines
1.3. Specification Comparison
1.4. Evaluating Data Setup and Hold Timing Slack
1.5. Migration Method from EPCQ to EPCQ-A for Arria® V, Cyclone® V, and Stratix® V Devices
1.6. Cyclone® V to Cyclone® V QS Device Migration Reference Manual
1.7. Document Revision History for AN 822: Intel® FPGA Configuration Device Migration Guideline
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1.3.3. Operation Codes
The following tables summarize EPCS, EPCQ, and EPCQ-A operation codes. For more detailed and up-to-date information, refer to the respective device datasheet.
Operation | Operation Code | ||
---|---|---|---|
EPCS | EPCQ | EPCQ-A | |
Write status | 01h | ||
Write bytes | 02h | ||
Read bytes | 03h | ||
Write disable | 04h | ||
Read status | 05h | ||
Write enable | 06h | ||
Fast read | 0Bh | ||
Read silicon ID | ABh 19 | — | ABh |
Read device ID | 9Fh 20 | 9Fh | 9Fh |
Erase bulk | C7h | ||
Erase sector | D8h | ||
Erase subsector | — | 20h | 20h |
Extended dual input fast read | — | BBh | BBh |
Extended quad input fast read | — | EBh | EBh |
Extended dual input fast write bytes | — | D2h | — |
Extended quad input fast write bytes | — | 12h | — |
Quad input fast write bytes | — | — | 32h 21 |
Read NVCR | — | B5h | — |
Write NVCR | — | B1h | — |
4BYTEADDREN | — | B7h | — |
4BYTEADDEX | — | E9h | — |
19 The read silicon ID is available in EPCS1, EPCS4, EPCS16, and EPCS64 devices only.
20 The read device ID is available in EPCS128 devices only.
21 Quad input fast write bytes operation is not supported in Intel® IP cores.