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1.1. Migration Considerations
1.2. Software Migration Guidelines
1.3. Specification Comparison
1.4. Evaluating Data Setup and Hold Timing Slack
1.5. Migration Method from EPCQ to EPCQ-A for Arria® V, Cyclone® V, and Stratix® V Devices
1.6. Cyclone® V to Cyclone® V QS Device Migration Reference Manual
1.7. Document Revision History for AN 822: Intel® FPGA Configuration Device Migration Guideline
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1.3.5.2. 16-Pin SOIC Device Package Dimensions
Figure 6. Package Dimension Diagram for 16-Pin SOIC Package Devices
Symbol | Min (mm) | Typical (mm) | Max (mm) | |||
---|---|---|---|---|---|---|
EPCS/EPCQ | EPCQ-A | EPCS/EPCQ | EPCQ-A | EPCS/EPCQ | EPCQ-A | |
A | 2.35 | 2.35 | — | — | 2.65 | 2.65 |
A1 | 0.1 | 0.1 | — | — | 0.3 | 0.3 |
A2 | 2.05 | 2.05 | — | — | 2.55 | 2.55 |
D | — | 10.08 | 10.3 BSC | — | — | 10.49 |
E | — | 10.01 | 10.3 BSC | — | — | 10.64 |
E1 | — | 7.39 | 7.50 BSC | — | — | 7.59 |
L | 0.4 | 0.38 | — | — | 1.27 | 1.27 |
L1 | — | — | 1.40 Ref | 1.40 Ref | — | — |
b | 0.31 | 0.31 | — | — | 0.51 | 0.51 |
c | 0.2 | 0.20 | — | — | 0.33 | 0.33 |
e | — | — | 1.27 BSC | 1.27 BSC | — | — |
Theta | 0° | 0° | — | — | 8° | 8° |