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1.1. Migration Considerations
1.2. Software Migration Guidelines
1.3. Specification Comparison
1.4. Evaluating Data Setup and Hold Timing Slack
1.5. Migration Method from EPCQ to EPCQ-A for Arria® V, Cyclone® V, and Stratix® V Devices
1.6. Cyclone® V to Cyclone® V QS Device Migration Reference Manual
1.7. Document Revision History for AN 822: Intel® FPGA Configuration Device Migration Guideline
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1.3.4.1. 8-pin SOIC Device Pin Information
Figure 3. Pin-Out Diagram for 8-pin SOIC EPCS, EPCQ and EPCQ-A Devices
Pin Number | AS x1 | AS x4 | |||
---|---|---|---|---|---|
EPCS | EPCQ | EPCQ-A | EPCQ | EPCQ-A | |
1 | nCS | nCS | |||
2 | DATA | DATA1 | DATA1 | ||
3 | VCC | DATA2 | |||
4 | GND | GND | |||
5 | ASDI | DATA0 | DATA0 | ||
6 | DCLK | DCLK | |||
7 | VCC | DATA3 | |||
8 | VCC | VCC |