Visible to Intel only — GUID: abq1501510072493
Ixiasoft
Visible to Intel only — GUID: abq1501510072493
Ixiasoft
1.1. Migration Considerations
You must consider the following items to determine the compatibility and the next step of action for a successful device migration.
IP Cores
Pins, Package and Capacity
Migration can only be done to an EPCQ-A device that has sufficient capacity for the programming file and have the same pin count package.
Pin 3 (nRESET) on the EPCQ64A and EPCQ128A devices act as a reset pin. This pin has an internal pull-up, and if you do not use the reset function, connect the nRESET pin to either VCC or leave it unconnected. Refer to Pin Information for more information about the pin-outs and descriptions.
Operation Commands
The dummy clock requirement of the fast read (0Bh) and extended quad input fast read (EBh) commands:
- EPCQ—the dummy clock is configurable with the non-volatile configuration register (NVCR). When the EPCQ is used with a Cyclone® V, Arria® V or Stratix® V device, the dummy clock is configured to be 4, 10 or 12, depending on the byte-addressing mode and ASx1 or ASx4 configuration. However, in EPCQ-A devices, the dummy clock is fixed at 8 and 6 for fast read and extended quad input fast read respectively. Therefore you must regenerate the programming files, such as .pof, .jic, and .rpd.
- EPCS—the dummy clock is fixed at 8 for fast read, therefore you do not have to regenerate the programming files if all other conditions are met. Table 3 defines the need to regenerate the programming files. Refer to IP Core and Programming File Migration Guideline for more information about the conditions.
Status Register
Status Register contains the Top/Bottom (TB) bit (bit 5), Block Protect (BP) bits (bit 4, bit 3, bit 2) for sector protection bits. EPCS devices do not have TP bit and some EPCQ device densities have BP3 (bit 6), while bit 6 is reserved in EPCQ-A devices. Due to this differences, you may need to recompile the programming file if your design uses the sector protect feature. Refer to Status Register for more information about status registers and sector protect bits.
Sector Size
All of the EPCS, EPCQ and EPCQ-A devices have the sector size of 512kb except for EPCS128 which has 2Mb. This impacts the sector erase operation. If the design is erasing the flash during user mode, you must update your design to comply the sector size when migrating from EPCS128 to EPCQ128A. After updating your design, regenerate a new programming file for the EPCQ-A device.