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1.1. Migration Considerations
1.2. Software Migration Guidelines
1.3. Specification Comparison
1.4. Evaluating Data Setup and Hold Timing Slack
1.5. Migration Method from EPCQ to EPCQ-A for Arria® V, Cyclone® V, and Stratix® V Devices
1.6. Cyclone® V to Cyclone® V QS Device Migration Reference Manual
1.7. Document Revision History for AN 822: Intel® FPGA Configuration Device Migration Guideline
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1.3.4.2. 16-pin SOIC Device Pin Information
Figure 4. Pin-Out Diagram for 16-pin SOIC EPCS, EPCQ and EPCQ-A Devices
Pin Number | AS x1 | AS x4 | |||
---|---|---|---|---|---|
EPCS | EPCQ | EPCQ-A | EPCQ | EPCQ-A | |
1 | VCC | DATA3 | |||
2 | VCC | VCC | |||
3 | Not connected | nRESET 22 | Not connected | nRESET 22 | |
4, 5, 6, 11, 12, 13 and 14 | Not connected | Not connected | |||
7 | nCS | nCS | |||
8 | DATA | DATA1 | DATA1 | ||
9 | VCC | DATA2 | |||
10 | GND | GND | |||
15 | ASDI | DATA0 | DATA0 | ||
16 | DCLK | DCLK |
22 There is an internal pull-up resistor for the dedicated nRESET pin. If the reset function is not needed, connect this pin to Vcc or leave it unconnected.