Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 9/30/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

TMO IP Performance and Resource Utilization

Intel provides resource and utilization data for guidance. TMO IP resource utilization depends on the device family and IP parameters, i.e. number of supported bits per sample and pixels in parallel.
Table 33.  Resource Utilization for Intel Agilex DevicesTargetting Intel Agilex AGIB027R29A1E1V device
Parameters Resource Utilization

Bits per Sample

Pixels in Parallel

ALMs M20Ks DSP Blocks
8 1 7,561 49 56
8 2 11,078 71 105
8 4 18,068 114 203
10 1 7,794 49 56
10 2 11,795 71 105
10 4 18,711 116 203
12 1 7,989 52 56
12 2 11,997 77 105
12 4 20,017 128 203
Table 34.  Resource Utilization for Intel Arria 10 DevicesTargetting Intel Arria 10 10AS066H1F34E1HG device.
Parameters Resource Utilization

Bits per Sample

Pixels in Parallel

ALMs M20Ks DSP Blocks
8 1 6,427 60 56
8 2 9,021 91 105
8 4 14,294 148 203
10 1 6,497 60 56
10 2 9,253 91 105
10 4 14,753 151 203
12 1 6,621 60 56
12 2 9,510 97 105
12 4 15,218 165 203
Table 35.  Resource Utilization for Intel Cyclone 10 GX DevicesTargetting Intel Cyclone 10 GX 10CX220YF672E5G device
Parameters Resource Utilization

Bits per Sample

Pixels in Parallel

ALMs M20Ks DSP Blocks
8 1 6,424 60 56
8 2 9,053 91 105
10 1 6,523 60 56
10 2 9,282 91 105
12 1 6,632 63 56
12 2 9,514 97 105
Table 36.  Resource Utilization for Intel Stratix 10 DevicesTargetting Intel Stratix 10 1SX280LN2F43E1VG device
Parameters Resource Utilization

Bits per Sample

Pixels in Parallel

ALMs M20Ks DSP Blocks
8 1 7,910 49 56
8 2 11,219 71 105
8 4 18,002 114 203
10 1 8,170 49 56
10 2 11,817 71 105
10 4 18,678 116 203
12 1 8,198 52 56
12 2 12,145 77 105
12 4 19,283 128 203