Visible to Intel only — GUID: hdc1508807585671
Ixiasoft
Visible to Intel only — GUID: hdc1508807585671
Ixiasoft
14.5.10. Debugging Checklist
Check |
Item |
---|---|
Try a different fit. |
|
Check IP parameters at the operating frequency (tMRD, tWTR for example). |
|
Ensure you have constrained your design with proper timing deration and have closed timing. |
|
Simulate the design. If it fails in simulation, it shall fail in hardware. |
|
Analyze timing. |
|
Place and assign RZQ (OCT). |
|
Measure the power distribution network (PDN). |
|
Measure signal integrity. |
|
Measure setup and hold timing. |
|
Measure FPGA voltages. |
|
Vary voltages. |
|
Heat and cool the PCB. |
|
Operate at a lower or higher frequency. |
|
Check board timing and trace Information. |
|
Check LVDS and clock sources, I/O voltages and termination. |
|
Check PLL clock source, specification, and jitter. |
|
Retarget to a smaller interface width or a single bank. |