Intel® C++ Compiler Classic Developer Guide and Reference

ID 767249
Date 3/31/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

Intrinsics for 4th Generation Intel® Core™ Processor Instruction Extensions

The 4th Generation Intel® Core™ Processor Instruction Extensions intrinsics are assembly-coded functions that call on 4th Generation Intel® Core™ Processor Instructions that include scalar instructions targeted for Intel® 64 architecture processors in process technology smaller than 32nm.

To use these intrinsics, include the immintrin.h file as follows:

#include <immintrin.h>

Functional Overview

The 4th Generation Intel® Core™ Processor Instruction Extensions include:

  • Four intrinsics that map to two hardware instructions ADOX and ADCX performing 32-bit or 64-bit arithmetic operations with flags.
  • One intrinsic that maps to the hardware instruction, PREFETCHW. This intrinsic allows data to be to prefetched into the cache in anticipation of a write. This intrinsic can be found in the Cacheability Support Intrinsics section.
  • Three intrinsics that map to the hardware instruction RDSEED. The intrinsics generate random numbers of 16/32/64 bit wide random integers.