Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 7/19/2024
Public
Document Table of Contents

5.4. SD/eMMC Host Controller

The hard processor system (HPS) provides a Secure Digital/Embedded Multimedia Card (SD/ eMMC) host controller for interfacing with external SD Flash cards, secure digital I/O (SDIO) devices, and eMMC storage devices.

The controller enables you to use SD cards and eMMC devices to store large amounts of data. Other applications include interfacing to SDIO devices.

The SD/eMMC host controller is based on the Cadence SD/eMMC Host Controller IP Part Number IP6061.