Visible to Intel only — GUID: ctc1666134341042
Ixiasoft
Visible to Intel only — GUID: ctc1666134341042
Ixiasoft
5.9.7.5.6. Receive FIFO Underflow
Setting the source transaction burst length greater than the watermark level can cause underflow where there is not enough data to service the source burst request. Therefore, the following equation must be adhered to avoid underflow:
DMA burst length = IC_DMA_RDLR + 1
If the number of data items in the receive FIFO is equal to the source burst length at the time of the burst request is made, the receive FIFO may be emptied, but not underflowed, at the completion of the burst transaction. For optimal operation, DMA burst length should be set at the watermark level, IC_DMA_RDLR + 1.
Adhering to this equation reduces the number of DMA bursts in a block transfer, which in turn can avoid underflow and improve bus utilization.