Visible to Intel only — GUID: tei1689721158384
Ixiasoft
Visible to Intel only — GUID: tei1689721158384
Ixiasoft
5.10.6.7.2. Multi-Master System
In a multi-master system, the ss_in_n signal is utilized by a decision-making logic to disable one master when another has priority.
The following example of “first-come-first-served” arbitration demonstrates the usage of the ss_in_n signal. There is a potential for bus locking if both masters assert their slave select outputs on the same clock edge. Therefore, to prevent such bus locking issues, a more complex arbiter block that adheres to the principles shown in the following figure should be used to arbitrate between master select outputs, slave select inputs, and master select inputs.