Visible to Intel only — GUID: pgd1679977395958
Ixiasoft
Visible to Intel only — GUID: pgd1679977395958
Ixiasoft
14.6.6.1.2. LUT Overflow Interrupt
Use the LUT table to generate two types of interrupts.
On every single-bit error detection and correction, the address of the error is logged in the LUT. Each address logged is unique and is at the data word boundary of its RAM bank. Coherency of the address table is maintained by a valid bit.
INTMODE value | INTONOVF value | Result |
---|---|---|
0 | X = Don't care | All errors generate an interrupt. No overflow data is logged. |
1 | 0 | An interrupt is generated for each new LUT entry. Overflow detection is disabled. Example: For a four-entry LUT, an interrupt asserts for each unique address entered in the LUT. |
1 | 1 | An interrupt is generated only when the LUT overflows. Example: If the LUT depth is four, the occurrence of the fifth unique address causes an interrupt to assert. |