Visible to Intel only — GUID: mew1675368466764
Ixiasoft
Visible to Intel only — GUID: mew1675368466764
Ixiasoft
4.3.6.4. Interrupts
This provides global, per-context and performance interrupts. All the interrupt signals are given in the following table:
Signal Name |
IO |
Connectivity |
Description |
---|---|---|---|
event_q_irpt_s |
O |
Connected to GIC |
Event queue, Secure interrupt. Asserts a Secure interrupt to indicate that the Event queue is not empty or has overflowed. |
event_q_irpt_ns |
O |
Connected to GIC |
Event queue, Non-secure interrupt. Asserts a Nonsecure interrupt to indicate that the Event queue is not empty or has overflowed |
cmd_sync_irpt_ns |
O |
Connected to GIC |
SYNC complete, Non-secure interrupt. Asserts a Nonsecure interrupt to indicate that the CMD_SYNC command is complete |
cmd_sync_irpt_s |
O |
Connected to GIC |
SYNC complete, Secure interrupt. Asserts a Secure interrupt to indicate that the CMD_SYNC command is complete |
global_irpt_ns |
O |
Connected to GIC |
Asserts a global Non-secure interrupt. |
global_irpt_s |
O |
Connected to GIC |
Asserts a global Secure interrupt. |
ras_irpt |
O |
Connected to GIC |
Asserts a Reliability, Availability, and Serviceability (RAS) interrupt. |
pmu_irpt |
O |
Connected to GIC |
Asserts a PMU interrupt |
evento |
O |
Connected to GIC |
Event output for connection to processors |
pri_q_irpt_ns |
O |
Connected to GIC |
Asserts a Page Request Interface (PRI) queue interrupt. |