Visible to Intel only — GUID: exg1674596406038
Ixiasoft
Visible to Intel only — GUID: exg1674596406038
Ixiasoft
7.6.5.1. EMAC Clocks
The following table shows the clock information for the EMAC clocks.
Clock Name | HPS Clock Source | Clock Destination | Description |
---|---|---|---|
emac0_clk | Clock manager | EMAC 0 | Clock for EMAC 0 when HPS is used. |
emac1_clk | Clock manager | EMAC 1 | Clock for EMAC 1 when HPS is used. |
emac2_clk | Clock manager | EMAC 2 | Clock for EMAC 2 when HPS is used. |
emac0_phy_txclk_o_hio | EMAC 0 | FPGA LE -> Pin | Transmit clock for EMAC 0 when FPGA interface is used instead of HPS I/O pins. |
emac1_phy_txclk_o_hio | EMAC 1 | FPGA LE -> Pin | Transmit clock for EMAC 1 when FPGA interface is used instead of HPS I/O pins. |
emac2_phy_txclk_o_hio | EMAC 2 | FPGA LE -> Pin | Transmit clock for EMAC 2 when FPGA interface is used instead of HPS I/O pins. |
The following table shows the registers used to program the clocks.
Clock Name | EMAC Select | *.src | *.cnt (n+1 divider) | *.div (2^n divider) | Clock Gate (enable) |
---|---|---|---|---|---|
emac0_clk | Emac0sel = 0 | ctlgrp.emacActr.src = 0 (Main_PLL_C1) = 1 (Peri_PLL_C3) |
ctlgrp.emacActr.cnt | --- | perpllgrp.en.emac0en |
Emac0sel = 1 | ctlgrp.emacBctr.src = 0 (Main_PLL_C1) = 1 (Peri_PLL_C3) |
ctlgrp.emacBctr.cnt | --- | ||
emac1_clk | Emac1sel = 0 | ctlgrp.emacActr.src = 0 (Main_PLL_C1) = 1 (Peri_PLL_C3) |
ctlgrp.emacActr.cnt | --- | perpllgrp.en.emac1en |
Emac1sel = 1 | ctlgrp.emacBctr.src = 0 (Main_PLL_C1) = 1 (Peri_PLL_C3) |
ctlgrp.emacBctr.cnt | --- | ||
emac2_clk | Emac2sel = 0 | ctlgrp.emacActr.src = 0 (Main_PLL_C1) = 1 (Peri_PLL_C3) |
ctlgrp.emacActr.cnt | --- | perpllgrp.en.emac2en |
Emac2sel = 1 | ctlgrp.emacBctr.src = 0 (Main_PLL_C1) = 1 (Peri_PLL_C3) |
ctlgrp.emacBctr.cnt | --- | ||
emac_ptp_clk | --- | ctlgrp.emacPTPctr.src = 0 (Main_PLL_C3) = 1 (Peri_PLL_C3) |
ctlgrp.emacPTPctr.cnt | --- | perpllgrp.en.emacPTPen |