Quartus® Prime Pro Edition User Guide: Debug Tools

ID 683819
Date 7/08/2024
Public
Document Table of Contents

2.6.1. Ensure Compatibility Between .stp and .sof Files

The .stp file is compatible with a .sof file if the logic analyzer instance parameters, such as the size of the capture buffer and the monitoring and triggering signals, match the programming settings for the target device.

If the files are not compatible, you can still program the device, but you cannot run or control the logic analyzer from the Signal Tap logic analyzer GUI.

Use either of the following methods to ensure compatibility between .stp and .sof files

  • Attach the .sof file to the .stp file in the SOF Manager. The SOF Manager ensures compatibility between any attached .sof files and the current .stp file settings automatically, as SOF Manager describes.
  • To ensure programming compatibility, program the FPGA device with the most recent .sof file.
Note: When the Signal Tap logic analyzer detects incompatibility after the analysis starts, the Quartus® Prime software generates a system error message containing two CRC values: the expected value and the value retrieved from the .stp instance on the device. The CRC value comes from all Signal Tap settings that affect the compilation.