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Release Information
LVDS SERDES IP Core Features
LVDS SERDES IP Core Functional Modes
LVDS SERDES IP Core Functional Description
LVDS SERDES IP Core Initialization and Reset
LVDS SERDES IP Core Signals
LVDS SERDES IP Core Parameter Settings
LVDS SERDES IP Core General Settings
LVDS SERDES IP Core Timing
LVDS SERDES IP Core Design Examples
Additional LVDS SERDES IP Core References
LVDS SERDES Intel FPGA IP User Guide Archives
Document Revision History for LVDS SERDES Intel® FPGA IP User Guide: Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices
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Obtaining TCCS Report
For LVDS transmitters, the Intel® Quartus® Prime software generates the TCCS report that provides the TCCS values for serial output ports.
To obtain the TCCS report (report_tccs), follow these steps:
- On the Intel® Quartus® Prime menu, select Tools > Timing Analyzer.
The Timing Analyzer window appears.
- On the Timing Analyzer menu, select Reports > Device Specific > Report TCCS.