Agilex™ 7 Power Management User Guide

ID 683373
Date 7/08/2024
Public
Document Table of Contents

5.1.4.1.2. Power Management and VID Parameters

You can use the following parameters to configure the Power Management and VID interface if the VID operation is in the PMBus Master mode.
Table 28.  Power Management and VID Parameters
Parameters Value Description
Bus speed mode 21 100 KHz Bus speed mode of PMBus interface when operating in the PMBus Master mode.
400 KHz
Slave device type21 ISL682XX

Supported device types.

Altera recommends you to use one of the slave device type listed in the drop-down menu that has been tested with the Altera® FPGA tools. If you are not using one of the slave device type listed in the drop-down menu, select Other option. When you select Other option, refer to Table: SmartVID Regulator Requirements, Table: Supported Voltage Output Format for Agilex™ 7 Devices with –V, –E, and –X Power Options, and Table: Supported Commands for the PMBus Master Mode for the voltage regulator requirements details.

LTC3888
LTM4677
PXE1410CDM_G005
XDPE12284C
XDPE15284D
ISL69260
Device address in PMBus Slave mode22 7-bit hexadecimal value Device address in the PMBus Slave mode.
Number of slave devices 1 to 7, or All Indicates the number of voltage regulator in the system.
PMBus device 0 slave address21 7-bit hexadecimal value

External power regulator address.

This parameter must be non-zero when you are using the PMBus Master mode.

PMBus device 1 slave address21 7-bit hexadecimal value External power regulator address.
PMBus device 2 slave address21 7-bit hexadecimal value External power regulator address.
PMBus device 3 slave address21 7-bit hexadecimal value External power regulator address.
PMBus device 4 slave address21 7-bit hexadecimal value External power regulator address.
PMBus device 5 slave address21 7-bit hexadecimal value External power regulator address.
PMBus device 6 slave address21 7-bit hexadecimal value External power regulator address.
PMBus device 7 slave address21 7-bit hexadecimal value External power regulator address.
Voltage output format21 , 23 Direct format

The voltage output format when the operation mode is PMBus Master.

If the voltage output format is the Direct format, you must set the following parameters:

  • Direct format coefficient m
  • Direct format coefficient b
  • Direct format coefficient R

If the voltage regulator is the Linear format, you must set the Linear format N parameter. 24

For more information about the parameters, refer to your selected voltage regulator data sheet.

For all voltage output format, you must also select the correct "translated voltage output unit".

Linear format
Direct format coefficient m21 Signed integer: -32768 to 32767 Direct format coefficient m of the slave device type when the operation mode is PMBus Master. For more information about the coefficient value, refer to the respective voltage regulator data sheet.
Direct format coefficient b21 Signed integer: -32768 to 32767 Direct format coefficient b of the slave device type when the operation mode is PMBus Master. For more information about the coefficient value, refer to the respective voltage regulator data sheet.
Direct format coefficient R21 Signed integer: -128 to 127 Direct format coefficient R of the slave device type when the operation mode is PMBus Master. For more information about the coefficient value, refer to the respective voltage regulator data sheet.
Linear format N21 Signed integer: –16 to 15 Output voltage command when the voltage output format is set to the Linear format.
Translated voltage value unit21 millivolts Indicates the translated output voltage is in millivolts (mV) or volts (V).
volts
Enable PAGE command21 Enable By enabling the PAGE command, the FPGA PMBus Master uses the PAGE command to set all the output channels (0xFF) on registered regulator modules to respond to VOUT_COMMAND. If only specified output channels on registered regulator modules must respond to VOUT_COMMAND, enter the corresponding page value (0x00 – 0xFF).
Disable
Enable status_byte for polling Enable

By enabling the STATUS_BYTE polling in the master mode, the firmware sends the STATUS_BYTE command for every 500 ms. This allows the firmware to analyze the error and put it into the EMQ.

Disable
21 This parameter is used for the PMBus Master mode.
22 This parameter is used for the PMBus Slave mode.
23 The Auto Discovery format is no longer available in the GUI selection for the Agilex™ 7 devices starting from the Quartus® Prime software version 22.2 onwards. When migrating your design project from the Quartus® Prime software version 22.1 (or older) to the Quartus® Prime software version 22.2 (or later), you can select either the Direct format or Linear format listed in the GUI.
24 N is the exponent of a 5-bit two's compliment integer.