DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 7/15/2024
Public
Document Table of Contents

3.4.6.3. Complete the MEX Function

Procedure

  1. Combine the template you extract from the testbench with the MATLAB array reading and writing code.
  2. Implement the functions csl_error, csl_warning, and csl_info. These functions receive warnings and errors from the simulation model. In this implementation they are left empty
    c++
    #include "support/csl_io.h"
    #include "demo_fft_FFT_2K.h"
    #include "mex.h"
    #include <assert.h>
    
    void csl_error(const char* msg)   { }
    void csl_warning(const char* msg) { }
    void csl_info(const char* msg)    { }
    
    void mexFunction(int nlhs, mxArray *plhs[], int nrhs, const mxArray *prhs[])
    {
        demo_fft_FFT_2K_t inst0;
        inst0.reset();
    
        size_t sizeIm = mxGetN(prhs[0]);
        size_t sizeRe = mxGetN(prhs[1]);
        // check the input arrays are all the same size
        assert(sizeIm == sizeRe);
    
        // get pointers to the integer data
        int* pIm = (int*)mxGetData(prhs[0]);
        int* pRe = (int*)mxGetData(prhs[1]);
    
        // allocate and initialize memory for output arrays
        for (int i = 0; i < 3; ++i)
        {
            plhs[i] = mxCreateNumericMatrix(1, sizeIm, mxINT32_CLASS, mxREAL);
        }
    
        // get int pointers to the output arrays
        int* pOutValid = (int*)mxGetData(plhs[0]);
        int* pOutIm = (int*)mxGetData(plhs[1]);
        int* pOutRe = (int*)mxGetData(plhs[2]);
    
        for (size_t i = 0; i < sizeIm; ++i)
        {
            // copy array input values to model input structs
            // and write them to the model
            demo_fft_FFT_2K_t::io_xc_s_t io_xc_s_t0;
            io_xc_s_t0.port_xc_s = 0;
            inst0.write(io_xc_s_t0);
    
            demo_fft_FFT_2K_t::io_xr_im_t io_xr_im_t0;
            io_xr_im_t0.port_xr_im = pIm[i];
            inst0.write(io_xr_im_t0);
    
            demo_fft_FFT_2K_t::io_xr_re_t io_xr_re_t0;
            io_xr_re_t0.port_xr_re = pRe[i];
            inst0.write(io_xr_re_t0);
    
            demo_fft_FFT_2K_t::io_xv_s_t io_xv_s_t0;
            io_xv_s_t0.port_xv_s = 1;
            inst0.write(io_xv_s_t0);
    
            // model internal state is progressed and results can now
            // be read and set in the output arrays
            demo_fft_FFT_2K_t::io_zr_im_t io_zr_im_t0;
            inst0.read(io_zr_im_t0);
            pOutIm[i] = io_zr_im_t0.port_zr_im;
    
            demo_fft_FFT_2K_t::io_zr_re_t io_zr_re_t0;
            inst0.read(io_zr_re_t0);
            pOutRe[i] = io_zr_re_t0.port_zr_re;
    
            demo_fft_FFT_2K_t::io_zv_s_t io_zv_s_t0;
            inst0.read(io_zv_s_t0);
            pOutValid[i] = io_zv_s_t0.port_zv_s;
        }
    }