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1. Intel® HLS Compiler Standard Edition Reference Manual
2. Compiler
3. C Language and Library Support
4. Component Interfaces
5. Component Memories (Memory Attributes)
6. Loops in Components
7. Component Concurrency
8. Arbitrary Precision Math Support
9. Component Target Frequency
10. Intel® High Level Synthesis Compiler Standard Edition Compiler Reference Summary
A. Supported Math Functions
B. Intel® HLS Compiler Standard Edition Reference Manual Archives
C. Document Revision History of the Intel® HLS Compiler Standard Edition Reference Manual
4.1. Component Invocation Interface
4.2. Avalon® Streaming Interfaces
4.3. Avalon® Memory-Mapped Master Interfaces
4.4. Slave Interfaces
4.5. Component Invocation Interface Arguments
4.6. Unstable and Stable Component Arguments
4.7. Global Variables
4.8. Structs in Component Interfaces
4.9. Reset Behavior
10.1. Intel® HLS Compiler Standard Edition i++ Command-Line Arguments
10.2. Intel® HLS Compiler Standard Edition Header Files
10.3. Intel® HLS Compiler Standard Edition Compiler-Defined Preprocessor Macros
10.4. Intel® HLS Compiler Standard Edition Keywords
10.5. Intel® HLS Compiler Standard Edition Simulation API (Testbench Only)
10.6. Intel® HLS Compiler Standard Edition Component Memory Attributes
10.7. Intel® HLS Compiler Standard Edition Loop Pragmas
10.8. Intel® HLS Compiler Standard Edition Component Attributes
10.9. Intel® HLS Compiler Standard Edition Component Default Interfaces
10.10. Intel® HLS Compiler Standard Edition Component Invocation Interface Arguments
10.11. Intel® HLS Compiler Standard Edition Component Macros
10.12. Intel® HLS Compiler Standard Edition Streaming Input Interfaces
10.13. Intel® HLS Compiler Standard Edition Streaming Output Interfaces
10.14. Intel® HLS Compiler Standard Edition Memory-Mapped Interfaces
10.15. Intel® HLS Compiler Standard Edition Arbitrary Precision Data Types
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4.3. Avalon® Memory-Mapped Master Interfaces
A component can interface with an external memory over an Avalon® Memory-Mapped (MM) Master interface.
You can specify the Avalon® MM Master interface implicitly using a function pointer argument or reference argument, or explicitly using the mm_master<> class defined in the "HLS/hls.h" header file. Describe a customized Avalon® MM Master interface in your code by including a reference to an mm_master<> object in your component function signature.
Each mm_master argument of a component results in an input conduit for the address. That input conduit is associated with the component start and busy signals. In addition to this input conduit, a unique Avalon® MM Master interface is created for each address space. Master interfaces that share the same address space are arbitrated on the same interface.
For more information about Avalon® MM Master interfaces, refer to "Avalon Memory-Mapped Interfaces" in Avalon Interface Specifications.
| Template Object or Argument | Description |
|---|---|
| ihc::mm_master | The underlying pointer type. |
| ihc::dwidth | The width of the memory-mapped data bus in bits |
| ihc::awidth | The width of the memory-mapped address bus in bits. |
| ihc::aspace | The address space of the interface that associates with the master. |
| ihc::latency | The guaranteed latency from when a read command exits the component when the external memory returns valid read data. |
| ihc::maxburst | The maximum number of data transfers that can associate with a read or write transaction. |
| ihc::align | The alignment of the base pointer address in bytes. |
| ihc::readwrite_mode | The port direction of the interface. |
| ihc::waitrequest | Adds the waitrequest signal that is asserted by the slave when it is unable to respond to a read or write request. |
| getInterfaceAtIndex | This testbench function is used to index into an mm_master object. |