Visible to Intel only — GUID: bhc1572908927724
Ixiasoft
Visible to Intel only — GUID: bhc1572908927724
Ixiasoft
3.2. C and C++ Libraries
HLS Header File | Description |
---|---|
HLS/hls.h | Required for component identification and component parameter interfaces. |
HLS/math.h | Includes FPGA-specific definitions for the math functions from the math.h for your operating system. |
HLS/extendedmath.h | Includes additional FPGA-specific definitions of math functions not in math.h. |
HLS/ac_int.h | Provides FPGA-optimized arbitrary width integer support. |
HLS/ac_fixed.h | Provides FPGA-optimized arbitrary precision fixed point support. |
HLS/ac_fixed_math.h | Provides FPGA-optimized arbitrary precision fixed point math functions. |
HLS/stdio.h | Provides printf support for components so that printf statements work in x86 emulations, but are disabled in component when compiling to an FPGA architecture. |
"HLS/iostream" | (Linux only) Provides cout and cerr support for components so that cout and cerr statements work in x86 emulations, but are disabled in component when compiling to an FPGA architecture. |
math.h
To access functions in math.h from a component to be synthesized, include the "HLS/math.h" file in your source code. The header ensures that the components call the hardware versions of the math functions.
For more information about supported math.h functions, see Supported Math Functions.
stdio.h
Synthesized component functions generally do not support C and C++ standard library functions such as FILE pointers.
A component can call printf by including the header file HLS/stdio.h. This header changes the behavior of printf depending on the compilation target:
- For compilation that targets the x86-64 architecture (that is, -march=x86-64 ), the printf call behaves as normal.
- For compilation that targets the FPGA architecture (that is, ‑march="<FPGA_family_or_part_number>"), the compiler removes the printf call.
If you use printf in a component function without first including the #include "HLS/stdio.h" line in your code, you get an error message similar to the following error when you compile hardware to the FPGA architecture:
$ i++ -march="<FPGA_family_or_part_number>" --component dut test.cpp
Error: HLS gen_qsys FAILED.
See ./a.prj/dut.log for details.
You can use C and C++ standard library functions such as fopen and printf as normal in all testbench functions.
iostream
Synthesized component functions do not support C++ standard library functions such as C++ stream objects (for example, cout).
A component can call cout or cerr by including the header file "HLS/iostream". This header changes the behavior of cout and cerr depending on the compilation target:
- For compilation that targets the x86-64 architecture (that is, -march=x86-64), the cout or cerr call behaves as normal.
- For compilation that targets the FPGA architecture (that is, -march="<FPGA_family_or_part_number>"), the compiler removes the cout or cerr call.
If you attempt to use cout or cerr in a component function without first including the #include "HLS/iostream" line in your code, you will see an error message similar to the following error when you compile hardware to the FPGA architecture:
$ i++ -march="<FPGA_family_or_part_number>" run.cpp
run.cpp:5: Compiler Error: Cannot synthesize std::cout used inside of a component.
HLS Main Optimizer FAILED.