Visible to Intel only — GUID: sam1412044482592
Ixiasoft
Visible to Intel only — GUID: sam1412044482592
Ixiasoft
1.4.1. Read Memory Capacity ID from the EPCS/EPCQ/EPCQ-L/EPCQ-A Device
The IP core registers the read_rdid signal on the rising edge of the clkin signal. After the IP core registers the read_rdid signal, the IP core asserts the busy signal to indicate that the read command is in progress.
Ensure that the memory capacity ID appears on the rdid_out[7..0] signal before the busy signal is deasserted. This allows you to sample the rdid_out[7..0] signal as soon as the busy signal is deasserted.
The rdid_out[7..0] signal holds the value of the memory capacity ID until the device resets. Therefore, you must execute this read command only once.
If you keep the read_rdid signal asserted while the busy signal is deasserted after the IP core has finished processing the read command, the IP core re-registers the read_rdid signal as a value of one and carries out the command again. Therefore, you must deassert the read_rdid signal before the busy signal is deasserted.