Visible to Intel only — GUID: sam1412044496142
Ixiasoft
Visible to Intel only — GUID: sam1412044496142
Ixiasoft
1.4.3. Protect a Sector on the EPCS/EPCQ/EPCQ-L/EPCQ-A Device
This command writes the EPCS/EPCQ/EPCQ-L/EPCQ-A status register to set the block protection bits. The block protection bits show which sectors are protected from write or erase, and provide protection in addition to that provided by the wren signal.
You can set the block protection bits in the EPCS/EPCQ/EPCQ-L/EPCQ-A status register to protect those sectors that contain configuration data, and are not intended for general-purpose memory usage.
Ensure that the 8-bit code is available on the datain[7..0] signal before asserting the sector_protect and wren signals. The IP core registers the sector_protect signal at the positive edge of the clkin signal.
The IP core asserts the busy signal as soon as it receives the sector_protect signal. The busy signal remains asserted while the EPCS/EPCQ/EPCQ-L/EPCQ-A status register is written.
If the wren signal has a value of zero, the IP core will not carry out the sector_protect signal, and the busy signal remains deasserted.
The IP core uses only bits 2 to 3, or 2 to 4 for EPCS devices, and 2 to 5, or 2 to 6 for EPCQ/EPCQ-L/EPCQ-A devices out of the 8 bits for block protection. The rest of the bits have other meanings for the ASMI operation, and cannot be overwritten by the sector protect operation. Whenever the input address is in a protected sector, the IP core omits the operation and the busy signal remains deasserted.